Part I: Floating Point Numbers Part II: Introduction to MIPS ISA

1
Part I Floating Point NumbersPart II
Introduction to MIPS ISA

• CS 440
• Computer Organization and Architecture
• WS2 v4
• Instructor Dwayne Ockel
• Images taken from Computer Organization and
  Design Patterson Hennessy (Morgan Kaufmann
  Publishers, 2nd ed. ISBN 1-55860-428-6 and 3rd
  ed. ISBN 1-55860-604-1

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Part IFloating Point Numbers
3
Floating Point Numbers

• Floating point numbers correspond to real numbers
  in mathematics
• Examples of real numbers
• ? 3.1415926535897932384626433832795.
• e 2.71828.
• ½
• 3,155,233,444,049
• 2.5910 X 104
• -12.5

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IEEE 754 Single Precision

• 32-bit (1 word in MIPS) representation of
  floating point value
• MSB is sign bit, followed by 8-bit exponent
  (biased by 12710), followed by normalized
  mantissa / significand (binary digits following
  leftmost 1)
• Exponent is biased so that 2s compliment doesnt
  have to be used (we have to be able to store
  positive or negative exponents), makes comparison
  of 2 FP numbers easier
• Range 2.010 X 10-38 to 2.010 X 1038 (Approx)
• Value (-1)s X (1Significand) X 2E-127
• All zeros represents the number zero

0
31
30
29
28
27
26
25
24
23
22
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20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
S
Biased Exponent (8-bits)
Normalized Mantissa / Significand (23-bits)
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IEEE 754 Double Precision

• 64-bit (2 MIPS words) representation of floating
  point value
• MSB is sign bit, followed by 11-bit exponent
  (biased by 102310), followed by normalized
  mantissa / significand (binary digits following
  leftmost 1)
• Exponent is biased so that 2s compliment doesnt
  have to be used, makes comparison of 2 FP numbers
  easier
• Range 2.0 X 10-308 to 2.0 X 10308 (Approx)
• Value (-1)s X (1Significand) X 2E-1023
• All zeros represents the number zero

0
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
S
Biased Exponent (11-bits)
Normalized Mantissa / Significand (20 bits in
first word)
0
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
Normalized Mantissa / Significand continued
into second word (32 bits in second word 52
bits total)
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FP Representation Example

• Convert 37.7510 to a single precision IEEE 754
  floating point value
• Convert number to binary
• 3710 1001012
• .7510 .112
• 37.7510 100101.112
• Normalize (move radix point until only a single 1
  to left of point)
• 100101.11 1.0010111 X 25
• So 0010111 (digits to right of radix point) are
  the normalized mantissa / significand
• Exponent must be biased (by adding 127) so 127
  5 132 10000100
• Sign is 0 because number is positive

0
0
1
0
0
0
0
1
0
0
0
0
1
0
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0

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Digits to right of radix point in normalized
mantissa / significand
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Floating Point Addition

• Both numbers must have same exponent
• Shift smaller number to match exponent of larger
  number
• Add the significands
• Renormalize the sum
• Since fixed number of digits in significand, may
  need to round the sum

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Floating Point Addition
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FP Addition Example

• Add 0.510 and -0.437510
• Convert to binary
• 0.510 0.12 1.0 x 2-12
• -0.437510 -0.01112 -1.11 x 2-22
• Step 1 convert number with smaller exponent to
  match other exponent
• -1.11 x 2-2 -0.111 x 2-1
• Step 2 Add the significands
• 1.000 x 2-1 0.111 x 2-1 0.001 x 2-1
• Step 3 Normalize the sum
• 0.001 x 2-1 1.000 x 2-4
• Step 4 Round the sum (not needed here since
  result fits in our four bits)

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Arithmetic Unit for FP Addition

• Small ALU used to subtract exponent of one
  operand from other to determine which is larger
  and by how much
• This difference controls the three multiplexors
• From left to right
• Select the larger exponent
• Select significand of smaller number
• Select significand of larger number
• Smaller significand is shifted right
• Significands added together using Big ALU
• Sum significand is renormalized (by shifting left
  or right and incrementing or decrementing
  exponent)
• Rounding creates final result

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Floating Point Multiplication

• Add exponents of operands to obtain new exponent
• Algebraically 2n X 2m 2nm
• When adding with biased exponents, must subtract
  bias from result because it has been included
  twice (has already been added to each operands
  exponent)
• Multiply the significands
• Renormalize the product
• Since fixed number of digits in significand, may
  need to round the product
• Calculate sign of product
• If operands have same sign sign of product is
  positive
• If operands have different sign sign of product
  is negative

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Floating Point Multiplication
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Part IIInstructions The Language of the Machine
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Design Principles

• Simplicity favors regularity
• Smaller is faster
• Good design demands good compromises
• Make the common case fast

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Registers

• All work in the CPU is done in registers
• Limited number of extremely fast storage areas
  inside the CPU
• Width of register is word size of machine
• MIPS 32-bits
• Limited number of registers
• MIPS has 32 registers (integer and reserved) 32
  floating point registers (also some other special
  registers we will discuss later)
• In MIPS, as a general rule, registers are denoted
  by two character names following a dollar sign
  (), e.g. t0, s3, etc. and can also be
  referenced directly by number, e.g. 1, 2, 3,
  etc. (more on this later)
• Some registers are reserved for CPU use
• Instruction register, Program Counter, etc.
• Some registers are general purpose, used to store
  variables, intermediary values, etc.
• s0,s1,s2,s3,s4,s5,s6,s7 typically used
  to store variables, etc.
• t0,t1,t2,t3,t4,t5,t6,t7,t8,t9
  typically used to store intermediary (temporary)
  values
• f0-f31 floating point registers used for
  floating point instructions

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Memory

• A large array of bytes
• The beginning of any variable or instruction is
  associated with a specific element of this array
  (its address)
• Memory contains both data (variables) and
  instructions
• Fundamental to concept of stored-program or von
  Neumann machine.
• Since all work is done on registers, data must be
  moved from memory to registers (load instruction)
  and from registers to memory (store instruction)

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Actual MIPS Memory Addressing

• Memory is typically addressed in bytes
• Most common MIPS instructions for moving data
  to/from memory use words (lw/sw instruction)
• As a result, memory is typically referenced in
  MIPS in multiples of 4 rather than 1.
• We move 4 bytes (one word) of data for each load
  or store from/to the registers.

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Big Endian vs. Little Endian

• When data spans multiple bytes can layout in two
  ways
• Big Endian Most significant byte is the word
  address (you store most significant byte in the
  smallest address)
• Sparc
• Little Endian Least significant byte is the word
  address (you store least significant byte in the
  smallest address)
• Intel
• Can have ramifications on portability, especially
  with files
• Consider the value 80AB12CA16 stored in memory
  address 5000-5003

BIG ENDIAN
LITTLE ENDIAN
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Instructions for a Machine

• High-Level (3GL, 4GL) Language
• Human readable, generally corresponds to multiple
  Assembly instructions
• C, C, C, ADA, Java, Pascal, Fortran, etc.
• Assembly Instructions
• A symbolic representation of a machine
  instructions
• Although most programming is done in a high-level
  language, some programs written directly in
  assembly
• Run-time libraries (like scanf, printf, etc.)
• Critical parts of code that are very time
  sensitive
• Device drivers
• Machine Instructions
• A sequence of bits that represent a basic
  operation that the machine is capable of
  performing, e.g. addition, store, branch, etc.
• Instruction Set
• Collection of machine instructions that a
  particular architecture understands

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Translation Hierarchy (based on C)
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Lets talk MIPS

• MIPS is a RISC (Reduced Instruction Set Computer)
  architecture as opposed to Intel Pentium
  architecture, for example, which is CISC (Complex
  Instruction Set Computer)
• Introduced in 1984 by researchers at Stanford
  University
• Good historical summary at http//www.wikipedia.or
  g/wiki/MIPS_architecture
• MIPS architecture is been used in numerous
  applications
• SGI workstations, Cisco routers, Nintendo 64,
  PlayStation 2, numerous embedded systems, and
  many others
• Very commonly used in teaching of computer
  architecture (hmmm, really?)
• MIPS architecture greatly influenced design of
  later RISC architectures including HP Precision
  Architecture and the DEC Alpha.

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General Classes of MIPS Assembly Instructions

• Arithmetic
• Perform arithmetic operations such as addition,
  subtraction, multiplication and division
  (examples integer add, sub, addi, addu, subu,
  addiu, mult, multu, div, divu, mfc0 floating
  point add.s, sub.s, mul.s, div.s, add.d, sub.d,
  mul.d, div.d)
• Logical
• Perform logical operations such as shifts, and,
  or, etc. (examples and, or, andi, ori, sll, srl)
• Data Transfer
• Move data between registers and memory (examples
  integer lw, sw, lbu, sb, lui floating point
  lwc1, swc1)
• Control Transfer
• Transfer control from one part of a program to
  another, to support if/then/else, function calls,
  etc. (examples integer beq, bne, slt, slti,
  sltu, sltiu j, jr, jal floating point bc1t,
  bc1f, c.lt.s, c.lt.d)

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MIPS Register Conventions
0
zero
Constant 0
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s0
f0
f1
General Purpose Floating Point Registers
1
at
Reserved by Assembler to handle large constants
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s1
f2
Saved General Purpose Registers (preserved
across call)
f3
2
v0
18
s2
f4
Expression Evaluation and function results
f5
3
v1
19
s3
f6
f7
4
a0
20
s4
f8
f9
5
a1
21
s5
Function Arguments
f10
f11
6
a2
22
s6
f12
f13
7
a3
23
s7
f14
f15
8
t0
24
t8
f16
Temporary General Purpose Registers cont.
f17
9
t1
25
t9
f18
Temporary General Purpose Registers (not
preserved across call)
f19
10
t2
26
k0
f20
Reserved for OS Kernel
f21
11
t3
27
k1
f22
f23
12
t4
28
gp
Pointer to global area
f24
f25
13
t5
29
sp
Stack pointer
f26
f27
14
t6
30
fp
Frame pointer
f28
f29
15
t7
31
ra
Return Address
f30
f31
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MIPS Memory Conventions

• Memory is addressed in bytes using a 32-bit
  address space
• Memory addresses 0 to 232-1 0 to 4294967295
• Memory often needs to be addressed in terms of
  words. Total number of words is 230-1
  1073741823. However, must address memory in
  terms of bytes, so word addresses are offset by 4
• Memory0, Memory4, Memory8, ,
  Memory4294967292

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MIPS Assembly Instructions

• General Form
• ltoptional labelgt ltoperationgt ltoperandsgt
• myadd addu s2, s3, s4
• subu s4,s5,s6
• Comments must be at end of line or on line by
  themselves following pound sign ()
• add t1, s3, s7 add s3 and s7 and store in t1

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MIPS Arithmetic/Logical Instructions

• Most arithmetic/logical instructions require 2 or
  3 operands.
• General Form 1
• ltoperationgt ltdestination_reggt, ltsrc_reg1gt,
  ltsrc_reg2gt
• General Form 2
• ltoperationgt ltdestination_reggt, ltsrc_reg1gt,
  ltconstantgt
• General Form 3
• ltoperationgt ltsrc_reg1gt, ltsrc_reg2gt
• General Form 4
• ltoperationgt ltdestination_reggt

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MIPS Data Transfer Instructions

• MIPS architecture can only access memory with
  load and store instructions, cannot access memory
  directly to do any work.
• General Form
• ltoperationgt ltreg1gt, ltconstantgt(ltreg2gt)
• Memory index is ltreg2gt (base address)
  ltconstantgt (offset)
• Note lw/sw instructions act on words, so offsets
  should be multiple of 4

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Some Practical Examples

• It is the compilers job to assign registers to
  variables
• Variables not currently being used must be moved
  back to memory since limited number of registers
  (called spilling registers) - store
• Variables that are in memory that need to be
  acted upon must be moved onto a register load
• Variable may use different register each time it
  is moved back and forth to memory

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C -gt MIPS Examples

• Lets look at some actual C code and how the
  compiler might generate MIPS Assembly based on
  that code
• Lets assume that the compiler associated the
  memory addresses of a,b,c and d with registers
  s1, s2, s3 and s4, respectively
• Corresponding MIPS Assembly instructions might
  look something like this

C Program int a, d unsigned int b, c a
(bc) d
MIPS Assembly lw t1, 0(s2) load b into
t1 lw t2, 0(s3) load c into t2 addu t1,
t1, t2 t1t1t2 lw t2, 0(s4) load d
into t2 sub t1, t1, t2 t1t1-t2 sw t1,
0(s1) store t1 to a
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C Array Example 1

• Consider the C Statement A12hA8
• The array indices indicate elements in the array,
  so must be multiplied by size of whatever the
  array contains
• For example, if array of ints and int is 4 bytes,
  then A12 is actually offset of 41248 from
  base address of array
• Note must be word boundaries to use lw, sw,
  otherwise must use lb, sb
• Consider this example assume base address of
  array (A0) is stored in s3 and h is stored in
  s2

C Program int A100 int h A12 h A8
MIPS Assembly lw t0, 32(s3) t0
A8 add t0, s2, t0 t0 h A8 sw t0,
48(s3) A12 h A8
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C Array Example 2

• Consider the C Statement g h Ai
• The array indices indicate elements in the array,
  so must be multiplied by size of whatever the
  array contains
• For example, if array of ints and int is 4 bytes,
  then A12 is actually offset of 41248 from
  base address of array
• Note must be word boundaries to use lw, sw,
  otherwise must use lb, sb
• Since array index is variable, must multiply it
  by element size
• Consider this example assume base address of
  array (A0) is stored in s3 and g, h, and i
  are stored in s1, s2, and s4, respectively

C Program int A100 int g, h, i g h
Ai
MIPS Assembly sll t0, s4, 2 t0i4 add t0,
t0, s3 t0 is now addy of Ai offset
base lw t1, 0(t0) t1 Ai add s1, s2,
t1 g h Ai
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Instructions for Decision Making

• Ability to make decisions separates computer from
  simple calculator
• Decisions are made via input and values created
  by computations
• Implemented in high-level languages as
  if-then-else syntax
• Implemented in assembly as branches or jumps

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Control Transfer Instructions

• General Form 1
• ltoperationgt ltdestination_reggt, ltsrc_reg1gt,
  ltsrc_reg2gt
• Commonly used for comparisons
• General Form 2
• ltoperationgt ltdestination_reggt, ltsrc_reg1gt,
  ltconstantgt
• Immediate form used for comparisons
• General Form 3
• ltoperationgt ltsrc_reg1gt, ltsrc_reg2gt, ltlabelgt
• General Form 4
• ltoperationgt ltlabel or registergt

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C if else Example

• Consider the C Program
• If igtj we must branch over the ki statement,
  otherwise program counter (PC) would simply be
  incremented by 4 and would fetch that instruction
  (more on this later)
• If iltj then must execute next statement and then
  jump over else condition so both dont get
  executed
• Assume that i, j, and k are in registers s2,
  s3, and s4, respectively

MIPS Assembly slt t0, s2, s3 if
(iltj) t01 else t00 beq t0, zero, Else
if false goto Else add s4, s4, s2
kki (note branch not taken) j Endif
goto Endif Else add s4, s4, s3
kkj Endif
C Program if (i lt j) k i else k j
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C Loop Example

• Loops are simply a collection of code that is
  repeated so long as some condition is true
• Assume that sum, i and the base address of A are
  in registers s2, s3, and s4, respectively

MIPS Assembly and s2, s2, zero sum0 or
s3, zero, zero i0 note a couple ways to do
this Loop sll s5, s3, 2 s5i4 add s5,
s5, s4 s5s5 A0 (now Ai) lw s5,
0(s5) s5Ai add s2, s2,
s5 sumsumAi addi s3, s3, 1 ii1
slti s5, s3, 100 test to see if i lt 100 bne
s5, zero, Loop goto Loop if I lt 100 NOT true
C Program sum 0 do sumAi
i while(ilt100)
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Supporting Procedures

• Steps involved in a procedure/function call
• 1. Place parameters somewhere where procedure can
  access them
• a0-a3 registers used for passed parameters
• 2. Transfer control to the procedure
• jump-and-link instruction (jal)
• 3. Acquire necessary storage for procedure (by
  moving stack pointer appropriately)
• 4. Perform the procedures code
• 5. Place result (return value) somewhere where
  the calling program can access it
• v0-v1 registers used for return values
• 6. Return control to the point of origin
• ra return address register

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Procedures cont.

• Procedures use the stack to create and destroy
  frames as procedures are called/return
• Registers that the procedure need to use must be
  saved to stack so they can be restored before
  returning to calling routing
• Stack grows from high addresses to low
  addresses

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Representing Instructions in the Computer

• Instructions are a sequence of bits (machine
  instruction or machine code)
• Fixed size in MIPS (32-bits)
• Some architectures do not have fixed size
  instructions which complicates their ISA
• MIPS has multiple instruction formats, but all
  are 32-bits
• Registers are encoded according to their number,
  e.g. 0zero, 8t0, 16s0
• See previous slide on MIPS registers

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MIPS Instruction Formats

• 3 Types of MIPS Instructions
• R-format (register format) arithmetics,
  logicals
• I-format (immediate format) transfer, branches,
  immediates
• J-format (jump format)
• op Basic Operation of Instruction (opcode)
• Rs First Register Source Operand
• Rt Second Register Source Operand
• Rd Register Destination Operand
• Shamt Shift Amount
• Funct Specific Variant of Operation in opcode
  (function code)

6-bits
6-bits
5-bits
5-bits
5-bits
5-bits
op
funct
rs
rt
rd
shamt
6-bits
5-bits
5-bits
16-bits
op
rs
rt
address/immediate
6-bits
26-bits
op
target address
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MIPS Instruction Formats Example

• 3 Types of MIPS Instructions
• R-format (register format)
• addu s1, s2, s3 s117, s218, s319
• op0 shamt0 funct33
• I-format (immediate format)
• lw t2, 40(s5) t210, s521
• op35
• J-format (jump format)
• j 10000 (note this is in bytes, need in words,
  so divide by 4)
• op2

000000 (0)
100001 (33)
10010 (18)
10011 (19)
10001 (17)
00000 (0)
op
funct
rs
rt
rd
shamt
100011 (35)
10101 (21)
01010 (10)
00000000 00101000 (40)
op
rs
rt
address/immediate
000010 (2)
00 00000000 00001001 11000100 (2500)
op
target address
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Starting a Program

• Executable file created by linker
• Operating system must read file into memory
  (loader)
• Loader responsibilities
• 1. Read executable file header to determine size
  of the text (machine code) and data segments
• 2. Create an address space large enough for the
  text and data segments
• 3. Copy instructions and data from executable
  file into memory
• 4. Copy parameters (if any) to the main program
  onto the stack
• 5. Initialize machine registers and set stack
  pointer to first free location
• 6. Jump to startup routine that copies parameters
  into argument registers, and calls main routine
  of the program. When the main routine returns,
  startup routine terminates the program via the
  exit system call

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End of WS 2 Presentation Materials