Parallel currentsteering DA Converters for Flexibility and Smartness

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Parallel current-steering D/A Converters for
Flexibility and Smartness

• Eindhoven University of Technology
• 2007 IEEE

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Contents

• Parallel DAC Architecture
• Flexibility
• Smartless
• Layout
• Conclusions

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Parallel DAC Architecture(1)

• This paper proposes a new way of grouping, in
  which every group is a
• separate (sub-) DAC

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Parallel DAC Architecture(2)

• Flexible DAC architecture hasthree distinct
  parts
• Digital pre-processor,
• DA conversion,
• Analog current
• summation.

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Flexibility

• Number of independent operational DACs
• DAC performance according to the application
• requirements

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Smartness(1)

• Clock-feedthrough, Data-feedthrough,
  Data-dependent disturbances of the substrate and
  power rails, systematic parasitics due to the
  layout, output glitches, etc.
• These errors result in harmonic distortion (HD)
  of the input signal.

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Smartness(2)

• Iout can be shown that the amplitudes Ah of the
  harmonic frequency components h?in of Iout are
• Appropriate number of parallel sub-DACs (k) and
  set of digital phase shifters (?i), any desired
  combination of HD components can be cancelled.

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Smartness(3)

• Example
• 3rd order distortion component
• In this case, only two sub-DACs are
• sufficient k 2 , ?1 0 , ?2 p/ 3 .
• while the 3rd order harmonic distortion
  component (h 3 ) is completely cancelled

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Layout
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Conclusions

• Its major advantage is that the end-user can
  customize the DAC performance and functionality
  via several op-modes.
• Particular attention was put on a method to
  suppress harmonic distortion, which uses
  phase-shifted parallel DA sub-conversion branches
  to improve the DAC dynamic performance.