Placement-Centered Research Directions and New Problems

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Placement-Centered ResearchDirections and New
Problems

• Xiaojian Yang
• Amir Farrahi
• Synplicity Inc.

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Topics

• Basic Requirements
• Mixed Block Standard-Cell Placement
• Incremental Placement
• Placement-In-Flow
• Congestion/Routability
• Timing Driven Placement
• Other objectives

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Basic Requirements

• Large scale problem
• Fixed-die with 50-80 density
• Wirelength
• Basic algorithms and methodologies
• Min-cut, Analytical, Annealing
• Clustering
• Multi-level
• Hierarchical

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Placement with white space
MCNC benchmarks
Industrial designs
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Mixed Mode Placement

• Fixed Macros
• Non-rectangle placeable area
• Min-cut and annealing can be adjusted. What about
  quadratic approach?
• Movable Macros
• Floorplanning macros then place standard-cells
• Clustering and floorplanning hard/soft macros
• Splitting hard macros to form standard-cell
  placement
• Modified partitioning --- cut hard macros
• Low utilization --- not packing-type
  floorplanning

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Incremental Placement

• Caused by various reasons
• Placement based logic optimization
• Clock tree construction
• Power rail / special nets construction
• ECO
• Incremental Detailed Placement
• Highly constrained
• Minimum disturbance if the change is small
• Appropriate replacement based on the amount of
  change
• Measurement of the disturbance

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Placement-In-Flow

• Floor-Placer (Steve Teig, ISPD2002)
• Mixed macro standard-cell placement
• Floorplan with unfixed soft macros
• Placement with unfixed hard macros
• Placement with Global Routing
• Change placement based on global routing results
• Placement in Physical Synthesis
• Choose the right optimization in placement
• Priorities of placement objectives
• Positions of Global/Detailed placement
• Interleaving logic synthesis optimizations

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Congestion/Routability

• Transparent congestion management
• Caldwell/Kahng/Markov DAC2000
• Congestion improvement if and only if required
• Tradeoff between congestion and wirelength/delay
• Use of White space / Free space
• Uniform distribution
• routability-driven distribution (not too
  aggressive)
• Routing resource aware placement
• Horizontal/vertical wires
• Blockages in routing layers

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Timing

• Avoid pure timing-driven placement
• May hurt other objectives
• Could focus on critical paths that can be easily
  fixed by logic changes
• Focus timing-driven placement with minor changes
  on the netlist
• Buffer insertion, Gate sizing, Gate replication
• Transparent timing optimization
• Again, tradeoff between delay and routability
• Constraint-driven rather than minimization
• Understanding the relationship between
  routability and timing
• Negative reducing congestion increases critical
  path
• Netural reducing congestion does not affect
  critical path
• Positive reducing congestion brings better
  post-routing delay

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Other Objectives

• Power Driven Placement
• Multi-voltage designs
• Signal Integrity Cross talk driven placement
• IR-Drop Issue and Placement
• Thermal Issue and Placement
• Placement Constraints
• High Density Design Placement
• Multiple objectives in placement

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Summary

• Placement remains a challenging problem, and
  becomes more difficult with more constraints
• There are always tradeoffs between placement
  objectives
• Placement combined with other optimizations could
  gain more
• Benchmarks are indispensable for academic research