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ECE 447 - Lecture 16

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Instruction Set of. MC68HC11. Groups of instructions (1) 1. ... BVS overflow set. BVC overflow clear. BPL plus 0. BMI minus 0. after testing register or memory ... – PowerPoint PPT presentation

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Title: ECE 447 - Lecture 16


1
ECE 447 - Lecture 16
Instruction Set of MC68HC11
2
Groups of instructions (1)
1. Data handling instructions a. Move
instructions (e.g., load, store,
exchange) b. Alter data instructions
(e.g., clear, increment, decrement) c. Edit
instructions (e.g., shift, rotate) 2.
Arithmetic instructions (e.g., add,
subtract, multiply, divide, negate) 3. Logic
instructions (e.g., and, or, xor) 4. Data
test instructions (e.g. compare, test, bit
test)
3
Groups of instructions (2)
5. Control instructions (e.g., jump, branch)
6. Condition code instructions (e.g., set
carry, clear overflow flag)
7. Stack operations (e.g. push, pull)
8. Subroutine-related instructions (e.g. jump
to subroutine, return from subroutine)
9. Interrupt-related instructions (e.g.
software interrupt, return from interrupt)
4
Move instructions (1)
N Z V C
1. memory ? register LDA A, B LD D, X,
Y, S 2. register ? memory STA A, B ST
D, X, Y, S 3. register ? register TAB,
TBA 4. memory ? memory
IMM, DIR, EXT, IND
0
0
DIR, EXT, IND
0
INH
5
Move instructions (2)
N Z V C
1. register ? register XGD X, Y

INH
6
Alter data instructions
N Z V C
1. 0 ? register CLR A, B 2. 0 ? memory CLR
INH
0 1 0 0
0 1 0 0
EXT, IND
3. increment X INC A, B INC IN X, Y 4.
decrement X-- DEC A, B DEC DE X, Y
INH EXT, IND INH


INH EXT, IND INH


7
Edit instructions - Shifts
N Z V C
. . .
1. logical shift right LSR A, B, D LSR 2.
arithmetic shift right ASR A, B, D ASR 3.
arithmetic/logical shift left ASL A, B, D,
LSL A, B, D ASL, LSL
0
C
0
n-1
INH EXT, IND
0
. . .
C
0
n-1
INH EXT, IND
. . .
0
C
0
n-1
INH EXT, IND
8
Edit instructions - Rotations
N Z V C
. . .
1. rotation right ROR A, B ROR 2. rotation
left ROL A, B ROL
0
7
C
INH EXT, IND
. . .
0
0
7
C
INH EXT, IND
9
Arithmetic instructions (1)
N Z V C
1. addition Acc M ? Acc ADD A, B, D ADC
A, B 2. subtraction Acc M ? Acc SUB A, B,
D SBC A, B
IMM, DIR, EXT, IND
IMM, DIR, EXT, IND
3. negation -X NEG A, B NEG
INH
EXT, IND
10
Arithmetic instructions (2)
N Z V C
1. addition Reg B ? Reg ABA AB X, Y 2.
subtraction A B ? A SBA
INH

INH
11
Arithmetic instructions (3)
N Z V C
1. unsigned multiplication A x B ?
D MUL 2. unsigned division D/IX ? IX D
mod IX ? D IDIV 3. unsigned fractional division
D lt IX (scaled by 216) D/ IX ? IX
(scaled by 216) D mod IX ? D 4. decimal
adjustment DAA

INH
0
INH

FDIV
INH
?
INH
12
Logic instructions (1)
N Z V C
1. AND Acc M ? Acc AND A, B 2. OR
Acc M ? Acc ORA A, B 3. XOR Acc ? M
? Acc EOR A, B
0
IMM, DIR, EXT, IND
0
IMM, DIR, EXT, IND
0
IMM, DIR, EXT, IND
13
Logic instructions (2)
N Z V C
1. complement X ? X COM A, B COM 2. bit
set M mask ? M BSET 3. bit clear M
mask ? M BCLR
INH EXT, IND
0 1
DIR, IND
0
0
DIR, IND
14
Data test instructions (1)
N Z V C
1. comparison R - M CMP A, B CP D, X,
Y
IMM, DIR, EXT, IND
2. comparison A B CBA
INH
3. test register TST A, B 4. test memory TST
0 0
INH
0 0
EXT, IND
15
Data test instructions (2)
N Z V C
1. Bit test Acc memory BIT A, B
0
IMM, DIR, EXT, IND
16
Control instructions (1) - Branches
N Z V C
REL
after comparison register vs. memory
unsigned numbers
signed numbers
BHI higher gt BLO lower lt BHS higher
or same ? BLS lower or same ?
BGT greater than gt BLT less than
lt BGE greater than or equal ? BLE less than
or equal ?
BEQ equal BNE not equal ?
17
Control instructions (2) - Branches
after arithmetic operations (testing for overflow)
unsigned numbers
signed numbers
BCS carry set BCC carry clear
BVS overflow set BVC overflow clear
after testing register or memory
BPL plus ? 0 BMI minus lt 0
unconditional
BRA always BRN never
18
Condition code instructions
1. set a flag 1 ? flag SE C, V, I 2.
clear a flag 0 ? flag CL C, V, I 3. change
all flags A ? CC TAP 4. read all flags
CC ? A TPA
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