InputOutput

1
Input/Output

• Chapter 5

5.1 Principles of I/O hardware 5.2 Principles of
I/O software 5.3 I/O software layers 5.4
Disks 5.5 Clocks 5.6 Character-oriented
terminals 5.7 Graphical user interfaces 5.8
Network terminals 5.9 Power management
2
5.1 Principles of I/O Hardware

• I/O Devices
• Block devices A block device is one that stores
  information in fixed-size blocks, each one with
  its own address.
• Common block sizes range from 512 bytes to 32
  Kbytes.
• It is possible to read or write each block
  independently of all the other ones.
• E.g., disks
• Character devices A character device delivers or
  accepts a stream of characters, without regard to
  any block structure.
• It is not addressable and does not have any seek
  operation.
• E.g., printers, network interfaces, mice, etc..
• Clocks or memory mapped screens does not belong
  to above categories.

3
5.1.1 I/O Devices
Some typical device, network, and bus data rates
4
5.1.2 Device Controllers

• I/O devices have components
• electronic component, which is called the device
  controller or adapter. On personal computers, it
  often takes the form of a printed circuit card
  that can be inserted into an expansion slot.
• mechanical component is the device itself.
• Device Controller's tasks
• convert serial bit stream to the block of bytes
• perform error correction as necessary
• transfer clean data to main memory

5
5.1.3 Memory-Mapped I/O

• (a) Separate I/O and memory space each control
  register and device data buffer register is
  assigned an I/O port. E.g., Intel 8086
• IN REG, PORT
• OUT PORT, REG
• (b) Memory-mapped I/O Control registers and data
  buffer registers are are mapped into memory
  space. E.g., PDP-11, Motorola 68000.
• (c) Memory-mapped I/O data buffer, and separate
  I/O ports for control registers. E.g., Pentium

6
5.1.4 Direct Memory Access (DMA) It is a means
of having a peripheral device control a
processor's memory bus directly.

• CPU programs the DMA controller by setting its
  registers so it knows what to transfer where.
• DMA controller initiates the transfer by issuing
  a read request over bus to the disk controller.
  The read request looks like any other read
  request, and disk controller does not know or
  care whether it came from CPU or DMA controller.
• Transfer data to memory.
• When read is complete, disk controller sends an
  acknowledge signal to DMA controller. DMA
  controller interrupts the CPU to let it know the
  transfer is complete.

7

• DMA data transfer mode
• Word-at-a-time mode DMA controller requests for
  the transfer of one word and gets it. This
  mechanism is called cycling stealing.
  Cycle-stealing Direct Memory Access (DMA) I/O
  steals bus cycles from an executing program and
  prolongs the execution time of the program.
• Block mode DMA controller tells the device to
  acquire the bus, issue a series of transfer, then
  release the bus. This form of operation is called
  burst mode. It is more efficient than cycle
  stealing because acquiring the bus takes time and
  multiple words can be transferred for the price
  of one bus acquisition.
• DMA data transfer
• DMA controller tells device controller to
  transfer data directly to main memory.
• DMA controller tells device controller transfers
  data to DMA controller, which then issues a
  second bus request to write a the word to
  wherever it is suppose to go. This scheme
  requires an extra bus cycle per word, but is more
  flexible to do device-to-device copies or
  memory-to-memory copies.

8
5.1.5 Interrupts

• I/O device sends interrupt request to interrupt
  controller. It does this by asserting a signal
  line on a bus line that has been assigned.
• Interrupt controller issues interrupt to CPU
• CPU acknowledges interrupt, stops what it is
  doing, and starts the interrupt processing. The
  number on the address lines is used as an index
  into a table called the interrupt vector to fetch
  a new program counter. This program counter
  points to the start of the corresponding
  interrupt service procedure.

9

• Precise interrupt An interrupt that leaves the
  machine in a well-defined state is called precise
  interrupt, which has four properties
• (1) PC is saved in a known place.
• (2) All instructions before the one pointed to by
  PC have fully executed.
• (3) No instruction beyond the one pointed to by
  the PC has been executed.
• (4) The execution state of instruction pointed to
  by PC is know.
• Imprecise interrupt An interrupt that does not
  meet above requirement. The machine with
  imprecise interrupts usually vomit a large amount
  of internal state onto stack to give the
  operating system the possibility of figuring out
  what was going on.

10
5.2 I/O Software Layers

• I/O software is structured in four layers
• interrupt handlers
• device drivers (device-dependent OS software)
• device-independent OS software
• user level software

11

• Interrupt handlers Kernel code that is executed
  in response to an interrupt
• at a very low level of the OS
• Device drivers low-level software hiding the
  device specific details to the file system (deals
  with abstract block devices)
• device dependent code
• each device driver handles one device type or one
  class of closely related devices
• issues commands to the device controller(s),
  i.e., to the device registers
• only the device driver knows about sectors,
  tracks, cylinders, heads, arm motion, interleave
  factors, motor drives, head setting times, and
  all other mechanics of making a disk work
  properly
• accepts request from the device-independent
  software above

12

• Device-independent I/O software (functions that
  are common to all devices)
• uniform interfacing for the device drivers
• device naming (major and minor device number)
• device protection
• providing a device-independent block size
• buffering
• storage allocation
• allocating and releasing dedicated devices
• error reporting
• User-space I/O software (small part)
• libraries linked together with user programs
  (system calls)
• spooling system daemon, spooling directory

13
5.4 DISKS5.4.1 Disk Hardware (studied in
COMP2400)

• Properties and advantages over main memory
• storage capacity available is much larger
• price per bit is much lower
• information is not lost when power is turned off
• Hardware
• platters, cylinders, tracks, sectors, arms, heads
• overlapped seeks

Head
Arm
Actuator
Platter
Outer track
Sector
Inner track
14
5.4.2 Disk Formatting
A disk sector

• Preamble Allow the hardware to recognize the
  start of the sector. It also contains the
  cylinder and sector numbers and some other
  information.
• Data Most disks use 512-byte sectors.
• ECC 16 bytes

15
Cylinder skew
What is the problem? Assume the head is
positioned at the inner most track, and system
will read 33 consecutive sectors. If no cylinder
skew, when the arm seeks from inner most track to
the 2nd inner most track, sector 0 in 2nd inner
most track will pass the head.
16
Cylinder skew calculation For example, a
10,000-RPM drive rotates in 6 msec. If a track
contains 300 sectors, a new sector pass under the
head every 20 µsec. If the track-to-track seek
time is 800 µsec, 40 sectors will pass by during
the seek, so the cylinder skew should be 40
sectors.
17
How to number the sectors?

• No interleaving
  Single interleaving Double
  interleaving

Problem of No interleaving Assume the
buffer of the disk controller can only store one
sector. When the buffer is full, it will send the
data to the main memory. While sending data to
the main memory, the next sector pass by the
head. It will wait for an entire rotation to read
next sector.
18
5.4.3 Disk Arm Scheduling Algorithms

• The time to read or write a disk block is
  determined by 3 factors
• the seek time the time to move the arm to the
  proper cylinder (most important)
• the rotational delay the time for the proper
  sector to rotate under the head
• the actual transfer time
• Three algorithms
• FCFS (first come, first served) the disk driver
  accepts the request one at a time and carries
  then out in that order
• SSF (shortest seek first)
• Elevator algorithm

19

• Example Assume that a disk has 40 cylinders and
  the initial position is at cylinder 11. new
  requests come in for cylinders 1, 36, 16, 34, 9,
  and 12. Calculate the total seeks of head by
  using FCFS, SSF, and elevator algorithmgt

Initial position
Pending requests
FCFS arm motion 10, 35, 20, 18, 25, and 3,
total is 111 cylinders.
20
SSF (Shortest Seek First) Algorithms
PENDING REQUESTS
SSF
INITIAL POSITION
X
X
X
X
X
X
X
Time
0 5 10 15
20 25 30
35 39
SSF arm motion 1, 3, 7, 15, 33, and 2, total
is 61 cylinders. Performance is good. However,
with a heavily loaded disk, the arm will tend to
stay in the middle of the disk most of time, so
requests at either extreme will have to wait.
21
Elevator AlgorithmsIt will a current direction
bit, UP or DOWN.
PENDING REQUESTS
INITIAL POSITION
X
X
X
X
X
X
X
Time
0 5 10 15
20 25 30
35 39
Elevator algorithm (Assume current direction is
UP (toward outside)) arm motion 1, 4, 18, 2,
27, and 8, total is 60 cylinders. Performance is
good. Upper bound on total motion is fixed it is
just twice the number of cylinders.
22

• Example Consider a 20GB disk that has 20
  surfaces over 10 platters. Each platter has 256
  tracks and the block size for the disk is 16KB.
  Assume that the size of each track is the same.
  Compute the size of each cylinder on the disk
  both in terms of the number of bytes and the
  number of blocks. Also, compute the size of each
  track. Identify the TRUE statement below with
  respect to these computations.
• Solution
• Since there are 256 tracks on each platter,
  there are 256 cylinders in the disk. Given that
  the capacity of the disk is 20GB, we determine
  that the size of each cylinder is 20GB/25680MB.
• Since the size of each block is 16KB, the number
  of blocks in each cylinder is 80MB/16KB5K or
  5120.
• From the fact that there are 20 surfaces, we can
  deduce that the size of each track is 80MB/204MB
  and each track contains 256 blocks.