Physical Memory and Physical Addressing ( Chapter 10 )

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Physical Memory and Physical Addressing(
Chapter 10 )

• by
• Polina Zapreyeva

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Memory Technologies
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RAM

• SRAM

• DRAM

write enable
write enable
circuit for one bit
circuit for one bit
input
output
input
output
refresh
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RAM

• Static RAM
• simple internal structure
• circuits of multiple transistors
• high speed
• no need to refresh information
• takes more space (lower density)
• high power consumption
• generates a lot of heat
• very expansive

• Dynamic RAM
• confusing internal structure
• capacitor-like circuit
• lower speed
• needs to be constantly rewritten
• takes less space (higher density)
• low power consumption
• less heat generated
• cheap

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Measures of Memory Technology

• Density
• Latency
• Cycle times

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Density

• Density number of bits/ standard size chip
• Higher density
• Advantages more memory in same physical space
• Disadvantages high power consumption and
  great amount of heat

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Speed

• Speed is
• how fast the memory responds to request
• Performance of read (access) and write
  (update) operations should be considered
  separately.

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Latency

• Latency is
• the time it takes to complete an operation.
• This is not the best measure of memory technology
  because it doesnt provide complete information.

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Memory Controller

• Processor, or any other device, accesses
  physical memory through a hardware known as
  memory controller that provides an interface.

Memory Controller
Physical Memory
Processor
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Steps to Process Memory Request
device presents a read or write request
controller translates that for the memory and
passes the signal for memory chips
controller returns an answer
controller resets hardware circuits for next
operation
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Read and Write Cycle Time

• Latency doesnt count the time that controller
  uses to reset its circuits. A better measure of
  performance is cycle time.
• Read cycle time and write cycle time measure how
  quickly the memory system handles successive
  requests.

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SDRAM and SSRAM

• Clock cycles of the processor and memory may
  differ. Memory controller handles this problem,
  but this results in delay.
• This problem had been fixed by synchronizing the
  two clocks. This resulted in two technologies
  SDRAM (synchronized DRAM) and SSRAM (synchronized
  SRAM)

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Multiple Data Rate Memory Technologies

• Fast Data Rate Memories
• Double Data Rate
• Quadruple Data Rate

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Memory Organization
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Internal Hardware Structure

• Memory bus (bus) is the hardware connection
  between a processor and memory.

parallel interface
physical memory
processor
controller
. . .
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Memory Transfer Size

• Memory transfer size is
• amount of data that can be read or written in
• a single operation. Also called word size or
• word width.
• Word is a block of memory with number of bits
  equal to memory transfer size.
• Note Word size defines the size of standard
  integer and single-precision floating point.

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Physical Addresses

• Word Addressing
• each word of memory is assigned a unique physical
  memory address
• higher performance
• reads or writes entire word

• Byte Addressing
• each byte of memory is assigned a unique physical
  memory address
• lower performance
• reads or writes single byte
• controller must support byte transfer

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Physical Memory Operations

• The controller for physical memory always accepts
  or delivers entire word hardware does not
  provide a way to read or write less than a
  complete word.
• When reading provides and address, when writing
  an address and data.

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Byte Addressing With Word Transfers

• To read a single byte
• convert byte address to word address
• read word
• extract desired byte
• To write a single byte
• - convert byte address to word address
• - read word
• replace desired byte
• write entire word back

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Translation of Addresses

• Mathematically
• word address byte address/ word size
• (ignore the reminder)
• byte offset byte address (mod (word size))

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Physical Address Number

• No computation required

Byte Address
offset
word address
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Memory Banks and Interleaving

• Memory bank is a memory unit with own controller
  application parallelism to increase performance.
  Can be controlled by the user.
• Interleaving spreading consecutive bytes of
  memory across separate memory modules. Often done
  automatically (parallelism).