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Design analysis of a 2.4 GHz CMOS Quadrature
VCO using AMSS35D4 technology RFSoC Final
Project Master in Electronics Engineering Josep
Maria Margarit Taulé Advisor Xavier Aragonès
Cervera
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Introduction Design procedure Results
Conclusion
1 Introduction 2 Design procedure 3
Results 4 Conclusion
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Introduction Design procedure Results
Conclusion
1 Introduction 2 Design procedure 3
Results 4 Conclusion
4
Introduction Design procedure Results
Conclusion
Introduction

• Complete design procedure of a 2.4 GHz LC CMOS
  quadrature VCO.
• Process technology AMSS35D4 (SiGe 0.35 ?m,
  4-metal, thick metal available).
• Tasks
• Initial rough calculations
• Accurate cadence rf-modelled simulation and
  tuning
• Result analysis and conclusions

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Introduction Design procedure Results
Conclusion
1 Introduction 2 Design procedure 3
Results 4 Conclusion
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Specs Calculations Single VCO QVCO
Introduction Design procedure Results
Conclusion
Specs
Spec Units Value
Vdd V 3.3
Power consumption mW lt25
Output load k?,pF
f0 GHz 2.4
Tuning range MHz 100
Harmonic distortion dBc lt-40
S.E. output amp. V 1 Vpp 15
Phase noise dBc lt-100
Phase error º lt1
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Specs Calculations Single VCO QVCO
Introduction Design procedure Results
Conclusion
Handy calculations

• First order, simplified expressions from subject
  topics
• Automatic calculation procedure

Excel worksheet
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Specs Calculations Single VCO QVCO
Introduction Design procedure Results
Conclusion
Single VCO (L selection)

• Thick metal (higher Q)
• Large L/Q desired less power consumption

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Specs Calculations Single VCO QVCO
Introduction Design procedure Results
Conclusion
Single VCO (varactor selection)

• Minimum varactors
• Higher QT

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Specs Calculations Single VCO QVCO
Introduction Design procedure Results
Conclusion
Single VCO (Itail calculation)

• Losses estimation
• Itail must be

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Specs Calculations Single VCO QVCO
Introduction Design procedure Results
Conclusion
Single VCO (nmos W-L choice)

• From previous Itail calculation (b2)
• But... Transistor losses!

• gds, gmb

• L1 µm
• Further considerations
• Adjustments Iterative tran simulations

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Specs Calculations Single VCO QVCO
Introduction Design procedure Results
Conclusion
Single VCO

• Itail 7 mA
• gm13 mS
• W75 µm
• L1 µm

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Specs Calculations Single VCO QVCO
Introduction Design procedure Results
Conclusion
QVCO
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Specs Calculations Single VCO QVCO
Introduction Design procedure Results
Conclusion
QVCO (coupling definition)

• Coupling factor

• Trade-off
• a Phase noise , but phase error !! a 1/3

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Specs Calculations Single VCO QVCO
Introduction Design procedure Results
Conclusion
QVCO (center frequency tuning)

• Pss simulations
• From an initial frequency (f0i)
• Cpoly resizing

350 fF
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Introduction Design procedure Results
Conclusion
1 Introduction 2 Design procedure 3
Results 4 Conclusion
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I-Q tran F/V Harm./Ph. noise Ph. error
Summary
Introduction Design procedure Results
Conclusion
Results (I-Q transient analysis)

• Vtank 900 mV
• Tinit 1.5 µs

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I-Q tran F/V Harm./Ph. noise Ph. error
Summary
Introduction Design procedure Results
Conclusion
Results (f/V pss analysis)

• ftun 2.35-2.45 GHz
• KVCO 268 MHz/V

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I-Q tran F/V Harm./Ph. noise Ph. error
Summary
Introduction Design procedure Results
Conclusion
Results (harmonic/phase noise analysis)

• Max. Harm. level -43.3 dBc
• Phase noise (600 kHz) -118 dBc

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I-Q tran F/V Harm./Ph. noise Ph. error
Summary
Introduction Design procedure Results
Conclusion
Results (phase error)

• Phase error

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I-Q tran F/V Harm./Ph. noise Ph. error
Summary
Introduction Design procedure Results
Conclusion
Results (summary)

• QVCO final parameters
• QVCO final results

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Introduction Design procedure Results
Conclusion
1 Introduction 2 Design procedure 3
Results 4 Conclusion
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Introduction Design procedure Results
Conclusion
Conclusion

• Complete design procedure of a 2.4 GHz LC CMOS
  quadrature VCO (SiGe 0.35 ?m, 4-metal, thick
  metal tech process)
• Tech. main drawback low QL Itail
• Design key points
• L selection (highest L-Q at main frequency)
• But... CtotalgtCparasitics!!
• gds to be considered!
• Coupling factor trade-off (Phase noise vs. Phase
  error)

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Design analysis of a 2.4 GHz CMOS Quadrature
VCO using AMSS35D4 technology RFSoC Final
Project Master in Electronics Engineering Josep
Maria Margarit Taulé Advisor Xavier Aragonès
Cervera