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Booth

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Port ( a : in std_logic_vector(width-1 downto 0); -- multiplicand ... when '01' = -- add multiplicand a. Yvector := Cvector Avector; ... – PowerPoint PPT presentation

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Title: Booth


1
Booths Algorithm
  • For Multiplication of Signed Numbers
  • CSE 670
  • Girma S. Tewolde
  • Monday, March 1, 2004

2
Booths Algorithm for multiplication of signed
numbers Example on 4-bit signed numbers 210 x
-310 00102 x 11012 1111 10102
3
Upper level Datapath
State machine for the upper level control
4
Sequential multiplier
controller
datapath
Note that ppdp is a combinational block that
implements one iteration of Booths algorithm
5
entity ppdp is generic(width positive)
Port ( a in std_logic_vector(width-1 downto
0) -- multiplicand b in
std_logic_vector(width-1 downto 0) -- multiplier
at the start c in std_logic_vector(wi
dth-1 downto 0) y1 out
std_logic_vector(width-1 downto 0) y2
out std_logic_vector(width-1 downto 0)
rbin in std_logic_vector(0 downto 0)
rbout out std_logic_vector(0 downto
0) ) end ppdp architecture ppdp_arch of ppdp
is begin mp1 process(a, b, c) variable
Avector std_logic_vector(width downto 0)
variable Cvector std_logic_vector(width downto
0) variable Yvector std_logic_vector(width
downto 0) variable overflow std_logic
variable sel std_logic_vector(1 downto 0)
variable y1v, y2v std_logic_vector(width-1
downto 0) begin -- to help catch carry
and overflow during add/subtract operations --
extend the width of the operation by one bit
Avector '0' a Cvector '0' c
sel b(0) rbin(0) --manipulate upper
portion of partial product according to 'sel'
case sel is when "01" gt -- add
multiplicand a Yvector
Cvector Avector overflow
Yvector(width) xor a(width-1) xor c(width-1) xor
Yvector(width-1) when
"10" gt -- subtract multiplicand a
Yvector Cvector - Avector
-- determine overflow Cout xor Cin from/to the
MSB overflow Yvector(width)
xor a(width-1) xor c(width-1) xor
Yvector(width-1) when others gt
Yvector Cvector
overflow '0' end case y1v
Yvector(width-1 downto 0) --shift 1 bit to the
right by sign extending MSB --check the overflow
flag when doing sign extension -- if overflow
'1' then, invert the sign bit for extension
y1(width-1) lt y1v(width-1) xor overflow
y1(width-2 downto 0) lt y1v(width-1 downto 1)
y2 lt y1v(0) b(width-1 downto 1) -- lower
partial product rbout(0) lt b(0) end
process mp1 end ppdp_arch
One iteration of Booths algorithm
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