H.Nomoto

1
Installation and Test of the ATLAS Muon Endcap
Trigger Chamber Electronics 
H.Nomoto ICEPP, University of Tokyo
2

1. Introduction
2. ATLAS detector
3. Level1 Muon endcap trigger (TGC)
4. TGC Installation Procedure
5. Sector construction
6. Sector Test
7. Installation in the pit
8. Purpose and Procedure of Sector Test
9. Test pulse run
10. Delay scan run
11. Summary of Sector Test
12. Future test programs foreseen in the pit
13. Full Big Wheel test
14. Cosmic run
15. Single beam halo run
16. Timing setup for the beam collision
17. Conclusion

3
Introduction
4
LHC-ATLAS Experiment
Barrel muon spectrometer
EM calorimeter
Inner tracker
7TeV proton
7TeV proton
Solenoid
25m
Barrel toroid
Endcap muon spectrometer
45m
Hadron calorimeter
Endcap toroid
5
Latest ATLAS topics

• In progress
• Barrel toroid cooled down, field tests now
  staring
• Barrel calorimeter in final position at Z0.
• Barrel cryostat cold and filled with Ar
• Two endcap calorimeter being moved inside the
  barrel toroid
• Solenoid field mapping
• Barrel SCT was inserted into barrel TRT and
  lowered to the pit
• Pixel layer2 done
• 65 of muon barrel chambers installed
• First TGC wheel completed

6
Solenoid field mapping complete
Good precision(10-4)
del Bz normalization(x1000)
Probe number
This solenoid was designed and made in JAPAN
The mapping campaign worked very well, in all
together 50 hours the magnetic field was measured
on 250.000 points inside the solenoid volume (4
different current values)
7
Copper Strip
All sectors of the first big wheel layer on
C-side installed
Wire
Two dimentional readout
12 complete sets of on-chamber electronics are
also installed
8
Level1Trigger System
Calorimeter Trigger
Muon Trigger
reduce event rate to 100kHz
Endcap Muon Trigger (TGC based)
Barrel Muon Trigger (RPC based)
Front-end Preprocessor
Jet/ Energy-sum Processor
Cluster Processor
Muon Trigger/CTP Interface
Muon Trigger
Central Trigger Processor
TTC
Barrel Toroid
Six Pt threshold
EC Toroid
9
TGC Electronics
M1
M2
M3
VME64 Crates (USA15)
HSC(VME) (Big Wheel edge)
PS-Board on TGC chambers
ASD
Trigger crate
SLB ASIC
PP
delay BCID
H-Pt wire
Trigger
3/4 Coin. Readout
Sector Logic
MUCTPI
PP
JRC
delay BCID
H-Pt strip
Readout crate
DCS-PS
Doublets
Readout
ROD
ROB
ASD
PP
SLB ASIC
delay BCID
SSW
2/3 Coin. Readout
Control crate
PP
JRC
delay BCID
CCI
Control
HSC
DCS-PS
Triplet
TTCvi
CTP
Service PP
CAN
DCS LCS
TTC signal fanout to PS-Boards
TTCrq
10
TGC Electronics uses four type of ASICs
radiation tolerant, high speed operation, mass
product
M1
M2
M3
VME64 Crates (USA15)
HSC(VME) (Big Wheel edge)
PS-Board on TGC chambers
ASD
Trigger crate
SLB ASIC
PP
delay BCID
H-Pt wire
3/4 Coin. Readout
Sector Logic
H-Pt
PP
JRC
delay BCID
H-Pt strip
Readout crate
DCS-PS
Doublets
ROD
ASD
H-Pt Board
PP
SLB ASIC
delay BCID
SSW
2/3 Coin. Readout
ASD
Control crate
ASD
PP
JRC
delay BCID
SLB
CCI
HSC
DCS-PS
Triplet
PP
TTCvi
Service PP
CAN
DCS LCS
TTC signal fanout to PS-Boards
TTCrq
PS Board
11
conv
TGC Electronics uses Antifuse FPGAs
radiation tolerant, short term development
M1
M2
M3
VME64 Crates (USA15)
HSC(VME) (Big Wheel edge)
PS-Board on TGC chambers
ASD
Trigger crate
SLB ASIC
PP
VME
delay BCID
H-Pt wire
3/4 Coin. Readout
Sector Logic
JRC
PP
JRC
delay BCID
H-Pt strip
Readout crate
DCS-PS
Doublets
H-Pt Board
ROD
SSWRX
ASD
PP
SLB ASIC
delay BCID
SSW
2/3 Coin. Readout
VME
PS Board
Control crate
PP
JRC
delay BCID
CCI
HSC
VME
DCS-PS
Triplet
TTCvi
Service PP
CAN
SSWTX
TTC signal fanout to PS-Boards
HSC Board
TTCrq
SSW Board
12
TGC Installation Procedure
13
two working areas
ATLAS pit
Sector assembly site
14
Sector assembly
Assemblies are done sector by sector. (12 x 1/12
sectors form one big wheel layer)
Two 1/12 sector assemblies are on going at the
same time.

• Horizontal assembly
• - frame assembly
• - cables arrangement
• - gas pipe arrangement
• Vertical assembly
• - chamber installation

15
Sector Test
19 Mini-rack on M1 wheel HSC Crate LV / HV /
LV-distributors patch-panel for optical fibers
TGC 18 Triplet TGCs per 1/12
Service Patch-Panel
ASD
PS-Boards
HSC Crate Special VME Crate CCI - HSC
interface H-pT Boards SSW Boards DCS card
Triplet PS-Pack 10 PS-Boards in 5 Al
boxes Service Patch-Panel Board
16
Installation into the ATLAS pit
Schedule
layer Assembly Installation
C-side M1 M2 M3 Done Done Done 8.Dec.06
A-side M1 M2 M3 Nov.06 1.Jan.07 22.Jun.07
17
Purpose and procedure of Sector Test
18
Sector Test
19 Mini-rack on M1 wheel HSC Crate LV / HV /
LV-distributors patch-panel for optical fibers
TGC 18 Triplet TGCs per 1/12

• Purpose
• Final check before installation
• electronics hardware components
• cable connections
• Draw delay curve and confirm timing adjustment

Service Patch-Panel
ASD
PS-Boards
Remarks - Use test pulses as signals - With only
one layer, trigger paths can't be checked
HSC Crate Special VME Crate CCI - HSC
interface H-pT Boards SSW Boards DCS card
Triplet PS-Pack 10 PS-Boards in 5 Al
boxes Service Patch-Panel Board
19
Signal flow

• Procedure
• Set delay parameters to ASICs on PS boards
• Send TTC regular interval test pulses to all ASD
  channels
• And check output data from test-ROD

M1
Readout crate
Readout
test ROD
Slink Receiver
ASD
PP
SLB ASIC
delay BCID
SSW
2/3 Coin. Readout
Control crate
PP
JRC
delay BCID
test pulse
CCI
Control
HSC
DCS-PS
Triplet
TTCvi
CTP
Service PP
CAN
DCS LCS
TTC signal fanout to PS-Boards
TTCrq
L1A, reset, test pulse
20
Delay scan

• Procedure
• Set coarse delay parameters in PP ASICs to the
  values calculated from cable length
• Take data with scanning fine delay values

Current bunch

• Result
• We can confirm sub-nano second timing adjustment
  functionality

Next bunch
Previous bunch
21
Summary of sector test
ASD testpulse run

• Encountered troubles
• One missing channel
• Weakly connected cables
• Broken cables
• Defective electronics
• Dead channels on chamber
• Missing channels per ASD
• Disconnected cables
• Unexpected signals
• Swapped cables

M1T8 layer1
Num of hit
channels
M1T8 layer2
Num of hit
channels
Num of hit
M1T8 layer3
channels
Have detected a lot of such troubles Have fixed
them if we can
12 x M1 and 12 x M2 sectors on C-side were tested
already. M3 sector test have started recently and
will finish in Oct.06.
22
Future test programs foreseen in the pit
23
Full sector test
Purpose - Check trigger path connections Test
connectivity with MUCTPI
Remarks - Use test pulses as signals
M1
M2
M3
VME64 Crates (USA15)
HSC(VME) (Big Wheel edge)
PS-Board on TGC chambers
ASD
Trigger crate
SLB ASIC
PP
delay BCID
H-Pt wire
Trigger
3/4 Coin. Readout
Sector Logic
MUCTPI
PP
JRC
delay BCID
H-Pt strip
DCS-PS
Doublets
Read out trigger patterns
ASD
PP
SLB ASIC
delay BCID
SSW
2/3 Coin. Readout
Control crate
PP
JRC
delay BCID
test pulse
CCI
Control
HSC
DCS-PS
Triplet
TTCvi
Service PP
CAN
DCS LCS
TTC signal fanout to PS-Boards
TTCrq
24
Cosmic run

• Purpose
• - Confirmation of delay values
• Chamber response to real particles
• Supply trigger for other detectors

Remarks - Mainly vertical flux - TOF correction
by delay should be reversed at upper side?
25
Low acceptance for ordinal two or three station
trigger coincidence because trigger windows are
opened only to the collision point
Preset fake hits and make one station
coincidence Supply trigger for other detectors
fake hits real hits
ex. M1 trigger
ex. M3 trigger
26
Single beam halo run
Scattering of beam by residual gas

• Purpose
• - Beam crossing clock phase tuning
• Chamber response to real particles
• Provide trigger for other detectors

Remarks - TOF correction is revered at upstream
TGC
TGC
27
Timing setup for the beam collision
Latency
M1
M2
M3
VME64 Crates (USA15)
HSC(VME) (Big Wheel edge)
PS-Board on TGC chambers
ASD
Trigger crate
SLB ASIC
PP
delay BCID
H-Pt wire
Trigger
3/4 Coin. Readout
Sector Logic
MUCTPI
PP
JRC
delay BCID
DCS-PS
Doublets
BC
TGC hit
PP in
SLB in
L1A into SLB
preset delay
cable delay
TOF
Confirmed at some tests in the pit
Confirmed at 1/12 sector test
28
BC
TGC hit
PP in
SLB in
preset delay
cable delay
TOF
BC
TGC hit
PP in
SLB in
cable delay
preset delay
TOF
M1
M2
M3
PS-Board on TGC chambers
ASD
SLB ASIC
PP
Variable TOF
delay BCID
3/4 Coin. Readout

• Calculate TOF values
• Set test pulse delays to each TOF values

PP
JRC
delay BCID
DCS-PS
delay
Get the same timing at all SLB inputs
Service PP
test pulse
Before beam collision starts, every timing setups
will be completed except for adjustment of phase
between BC clock and TTC clock
TTC signal fanout to PS-Boards
TTCrq
29
Conclusion
30
Installation

• One big wheel (M1 C-side) was installed in the
  pit.
• All 12 sets of another big wheel (M2 C-side)
  were tested already and wait to be moved to the
  pit.
• The last big wheel sector (M3 C-side) tests are
  now in progress.
• Another side (A-side) sectors will be assembled
  and tested from this November.

Future test plan

• Full big wheel test will start when three C-side
  big wheels areall installed.
• Cosmic run will start as soon as the previous
  test is completed.
• Single beam halo run will start in Nov.07

31
(No Transcript)
32
memo
33
o Rate timing L1B depth turning BC clock phase turning Trigger for other detectors From when
1/12 slice test good fine delay No No No assembling of 1/12
Test pulse good Coarse delay yes No yes cabling and low vol.
Cosmic ray vertical mainly yes yes TOF corr. No yes TOF corr. HV on
Beam halo inner mainly yes yes TOF corr. yes TOF corr. yes TOF corr. Single-beam
Beam gas yes low pt yes yes yes yes Single-beam
34

• Commissioning of the ATLAS Level-1 Central
  Trigger
• by Thilo PAULY (CERN)
• The Octant Module of the ATLAS Level-1 Muon to
  Central Trigger Processor Interface
• by Stefan HAAS (CERN)
• - The ATLAS Barrel Level-1 Muon Trigger
  Calibration by Riccardo VARI (INFN)
• ATLAS TDAQ RoI Builder and the Level 2
  Supervisor system
• by Yuri ERMOLINE (MSU)
• Setup, tests and results for the ATLAS TileCal
  Read Out Driver production
• by Alberto VALERO (IFIC UV-CSIC)