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Recent Advances in Stochastic Decoding

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LDPC Codes are the next wave. They provide the best error ... efficient ASICs. Easy, scalable and portable design. Potential for very low-power. G Harling ... – PowerPoint PPT presentation

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Title: Recent Advances in Stochastic Decoding


1
Recent Advances in Stochastic Decoding
  • Gord Harling
  • Prof. Warren Gross, Prof. Shie Mannor
  • McGill University
  • Montreal, Quebec, Canada

2
LDPC Codes are the next wave
  • They provide the best error correction
    performance of all known codes
  • Standards
  • DVB-S2
  • IEEE 802.3an (10GBASE-T)?
  • IEEE 802.16e (WiMAX)?
  • IEEE 802.11n (WiFI)?

3
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4
Belief Propagation (Sum-Product Algorithm)?
5
Belief Propagation (Sum-Product Algorithm)?

6
Architectures
  • Fully parallel
  • - bit serial,
  • - analog
  • - stochastic
  • (big, fast)?
  • Partially parallel
  • (small, slow, flexible but limited to only
    certain codes)?

7
Stochastic representation
P 0.76 ( 19/25)? 0111111110011011011111011
  • Encode probabilities as streams of random bits
  • Common fallacy low precision
  • 0.001 (10 bits in fixed-point vs. 1000 bits in
    stoc)?
  • Robust applications
  • Care about flow of changes of statistics of bits
    rather than on the precise value in a discrete
    frame of bits

8
multiplication
division
9
Stochastic decoding
  • Stochastic decoding is a digital relaxation
    process
  • Belief propagation, not message passing
  • Very efficient parallel HW implementation
  • lay out the graph in silicon
  • Bit-serial
  • Reduces routing congestion
  • 75/83 fewer wires than 4/6 bit sum-product
    algorithm
  • Fully digital easy to design, scale, and port

10
Stochastic Parity-Check Node Gaudet and Rapley,
Elec. Letters 2003
Soft XOR
11
Stochastic Variable Node Gaudet and Rapley,
Elec. Letters 2003
12
Variable Nodes
  • Significant sharing of random numbers
  • Share between comparators / EMs

13
Stochastic Decorrelators
  • Decorrelation on the cheap!
  • Break lock-up cycles
  • Output stream has same stats
  • Keep a flow of good (regenerative) bits
  • Remember/use only the regenerative bits


Agreement
Disagreement

old outcomes
14
Applications 10 Gigabit Ethernet
  • A single, low-overhead, high-performance LDPC
    code.
  • IEEE 802.3an (10 GbE)
  • 1723/2048 code
  • No error floor to 1e-12
  • 4 twisted pairs running at a raw bit rate of 2.5
    Gbps (PAM encoded for a symbol rate of 800 Mbaud)

15
Francois Leduc-Primeau, Warren Gross, Shie
Mannor, 2008
16
Applications WiFi and WiMAX
  • Modern wireless standards define LDPC codes with
    multiple operating modes.
  • IEEE 802.11n (WiFi)
  • 648, 1296, and 1944 bit codewords
  • 1/2, 2/3, 3/4, and 5/6 code rates
  • IEEE 802.16e (WiMAX)
  • 576, 672, ... , 2208, 2304 bit codewords (19
    sizes!)?
  • 1/2, 2/3a, 2/3b, 3/4a, 3/4b, 5/6 code rates

17
FPGA Implementation
  • Avg. clocks (10-8 BER ) 141
  • Max clocks 700 (740 w/ I/O)?
  • Latency 3.3 ?s _at_ 222 MHz
  • (trade-off is possible)?
  • T/P gt 1 Gbps for SNR gt 3 dB
  • 1.66 Gbps at SNR 4.25 dB

18
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19
Conclusions
  • Stochastic decoding a new approach to LDPC
    decoders
  • Fully-parallel LDPC decoder
  • Fast (gt 1 Gbps) and area-efficient
  • Bit-serial interleaver and simple node HW
  • ? efficient ASICs
  • Easy, scalable and portable design
  • Potential for very low-power

20
Acknowledgements
  • Saeed Sharifi Tehrani
  • Kevin Cushon
  • Francois Leduc-Primeau
  • Prof. Shie Mannor
  • Prof. Warren Gross
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