Jung H' Kim 1

1
SYEN 3330 Digital Systems

• Chapter 6 Part 5

2
Overview of Chapter 6

• Types of Sequential Circuits
• Storage Elements
• Latches
• Flip-Flops
• Sequential Circuit Analysis
• State Tables
• State Diagrams
• Sequential Circuit Design
• Specification
• Assignment of State Codes
• Implementation
• HDL Representation

3
Sequential Circuit Implementation
4
State Coding Example 1

• How may assignments of codes with a minimum
  number of bits?
• 2 A 0, B 1 or A 1, B 0
• Does it make a difference?
• Only in variable inversion, so small if any.

5
State Coding Example 2

• How may assignments of codes with a minimum
  number of bits?
• 4 ? 3 ? 2 ? 1 24
• Does code assignment make a difference?
• See Next Two Slides

6
State Coding Example 2

• Code 1 A 0 0, B 0 1, C 1 0, D 1 1
• See Next Slide

7
State Coding Example 2

• Code 2 A 0 0, B 0 1, C 1 1, D 1 0
• So it does make a difference in cost!

8
Implementation

• Using code 2

9
Implementation with DFF

• Using D Q(t1)

10
DFF Schematic
11
Implementation with TFF

• Using T Q(t) ? Q(t1)

12
Implementation with JKFF
13
Implementation with JKFF (Cont.)
14
Implementation with JKFF (Cont.)
15
RS Flip-Flop Implementation
16
RS Implementation (Cont.)
17
Sequential Logic Design Process
18
Second Example Register File CellState
Diagram Design

• Make the state unchanged (Hold Reg) by adding all
  unused input combinations for each state.

CLS,LDS,Data_in
State/Data_out(i)
0, 1, 0 1, -, -
0, 1, 1
A/0
B/1
RESET
0,1,1 0,0,-
0,1,0 1,-,- 0,0,-
19
Second Example Register File CellState Table
State Assignment (A0, B1)
20
DFF Implementation

• Moving State Table Data to a K-Map and Solving

21
JKFF Implementation

• Moving State Table Data to a K-Map and solving

LDS
LDS
KQ
X
X
X
X
JQ
0
0
1
0
X
X
X
X
CLS
0
0
0
0
CLS
1
1
1
1
Q
X
X
X
X
Q
0
1
0
0
X
X
X
X
Data_in
Data_in
22
Review Excitation Tables