Title: Slice Test results
1Slice Test results Beam test plan
ATLAS TGC-E monthly mtg. 7/Feb./2003 R.Ichimiya
(Kobe-u)
- -Contents-
- Slice Test Setup
- Status Results
- plan of coming Beam test
- Rehearsals in Kobe TGC Test Facility
- Beam test in CERN H8
2TGC Electronics System
- 3 Main Paths
- Trigger
- Readout
- Control
ASD
- In this Slice Test, following issues were
performed. - Trigger Trigger result comparison with the
simulator output. - Readout Measurement of data error rate, maximum
L1A rate. - Control Control various parameters via
CCI-HSC-SSW-JRC path. (Input MASK, delay, Test
Pulse Mask,)
3Slice Test Setup
SLB
PP
SL
Server elec01
G-LINK (20m)
Server elec05
TOM
LVDS (7m)
General-Purpose FIFO Module
PPG50
HPT
SPP
General-Purpose Pulse Gen.
SSW
ROD
VME Crate2(HSC)
VME Crate3(9U)
TTC
VME Crate1
Client elecref (Run Controller)
Clock, L1A,
LAN
- Slice Test performs under ATLAS Online Software
environment. - Patch Panel input data are generated by PPG
module. - Trigger results from Sector Logic are collected
by TOM(FIFO module). - All controls are performed through Run Controller
on elecref. - TTC Rx are installed on SPP board and ROD module.
4Slice Test Setup(contd.)
SL
ROD
TOM
G-Link Optical cable Slice Test20m,
ATLAS100m
SSW
HPT
TTC
PPG50
PS boards
- LVDS Serialized Cat.5 LAN cable
- Slice Test7m? ATLAS15m
5Status Results (trigger path)
Result of Test Vector Comparison
Status
- Data Links between each modules OK
- Parameter setting via control path OK
- Test Vector Comparison OK
-
Check
Trigger System Hardware
Test bit-pattern
compare
Trigger System Simulation
6Status Results (Latency Measurement)
- Design Value (TDR)1250ns
- Measured Latency1205ns
Acceptable!
7Status Results (readout path)
- Status
- L1A are fed from PPG (emulated).
- Not Integrated with Online Software yet.
- SLB ASICx2, SSW(PT4)x1
- Result
- 100,000 cycles test ? 0 error (100m optical
cable) - Maximum L1A trigger rate 78kHz lt100kHz
- Hit Occupancy 2 (Design Value)
ROD
SSW(PT4)
Readout Path
8Status Results (control path)
- HSC-CCI (Remote VME control system)
- HpT Configuration by JTAG via HSC-CCI OK
- HpT Configuration by VME via HSC-CCI OK
- SSW FPGA Configuration via HSC-CCI OK
- TTC
- Test Pulse Trigger Test with PP(ASD), SLB
- gt Komatsu-kuns Talk
CCI
HSC
SSW(PT4)
Control Path
To PS Board
9plan of coming Beam Test (my proposal)
HPT
TGC
PS Pack
SL
TTC
MUCTPI
SLB-IN
SL-OUT
ROD
SSW
SSW
DAQ
compare
SL-OUT
SLB-IN
SL-OUT
Trigger System Simulation
10Rehearsals in Kobe TGC Test Facility
- Purpose
- Get experiences on TGC operations and handlings.
(For TGC Electronics Group) - Full system rehearsal for CERN H8 Beam Test.
- Schedule and Plan
- 1-week in march.
- Cosmic-Ray Test.
- Scintillator trigger is provided.
- DCS (Israel Group) is connected.
11Beam test in CERN H8
- Plan
- Full system operation (via Online Software).
- Can be connected with MUCTPI, ROS.
- Data comparison with DAQ-ed data.
- Schedule and Manpower
- 1-week in May (5/May-).
- Japan TGC-E, TGC Production group, Israel TGC
group, Tokyo Office Staff(Ishino-san, etc),