TCI Implementation on Reconfigurable Platforms

1
TCI Implementation on Reconfigurable Platforms

• Tim Tuan
• 3/7/2000

2
Background

• What
• Mapping TCI blocks to FPGA, PLD, etc.
• Why
• Determine implementation feasibility of the TCI
  protocol design
• Compare FPGA vs. PLD

3
Methodology

• Functional Blocks
• CRC, CRCFSM (data), Physical Send (control)
• Platforms
• Xilinx XC4000XL (FPGA)
• Altera MAX (standard PLD)
• Xilinx CoolRunner (low-power PLD)
• Metrics
• Power (mW), Area (gates), (Speed)
• Design entry Verilog

4
Results Utilization

• Gate count based on CLB/product-term utilization
  ( used total gates)
• Note Altera performs better for the control
  blocks.

5
Results Power

• Method
• Use power equations from Data Books.
• Based on utilization
• Assumptions
• 25MHz
• 20 toggling rate
• CoolRunner
• Claims to be 30 of Altera.

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Next Up

• Low-Power FPGA
• 70x improvement in power predicted
• Needs better tool for mapping designs
• Low-Power PLD??