System on Chip : Functional Specifications targeted to HardwareSoftware implementation

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System on Chip Functional Specifications
targeted to Hardware/Software implementation
Frédéric PETROT
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Outline

• Introduction
• Motivations
• System level specifications goals
• Kahn Process Networks
• KPN Limitations
• Conclusion

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Design of an Embedded System

• Or more precisely of an embedded application,
• Homogeneous initial executable specification
• Design method for an Hardware/Software
  implementation

• Method as a trade-off between automation and
  design quality
• Should require as few rewrites as possible, and
  without semantic changes nor languages changes if
  possible
• ? constraints on the specification language

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Motivations Amdahl law

• ? Specification language must express coarse
  grain parallelism

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Specifications Coarse grain parallelism

• Initial application is sequential
• Coarse grain parallelism extraction done by the
  designer

• Process Network
• Nodes Task executing a sequential program
• Arcs Data/Control/Event dependencies

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Task mapping and synthesis

• Parallel specification suitable to hw/sw
  implementation
• sw Task compiled and executed on a
  multi-task-kernel
• hw Task synthesized by High Level Synthesis tools

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Communication synthesis

• communications Assumes existing sw/sw, sw/hw,
  hw/sw and hw/hw communication templates

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KPN have these capabilities

• Kahn Process Networks Well adapted to infinite
  data streams
• gt Set of sequential tasks communicating though
  FIFOs
• FIFOs properties
• FIFOs with an infinite number of items
• A unique producer writing p items at once
• A unique consumer reading q items at onceIf less
  than q items are available, consumer is blocked
• No way to test for the existence/absence of a
  data in a FIFO

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KPN Properties

• KPN properties
• Deadlock is a property of program, not of
  scheduling

The data order in each channel does not depend on
the task evaluation order Relative speed of
execution of the tasks does not influence the
behavior of the program
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KPN made practical

• Problem
• Infinite FIFOs are not that practical,
• Bounded number of items ? blocking writes

• Properties of this new model are mostly identical
  to KPNs but
• FIFOs filling (not data order!) now depends on
  tasks evaluation order
• Deadlocks may appear on bounded programsHowever
  deadlocks can always be avoided by
• Enlarging the FIFOs
• Splitting the transfer in chunks

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KPN practical execution

• KPN are easily implemented in multi-task OS,
  (POSIX threads)
• Quite efficient (C) 4 to 5 time slower than
  sequential spec.
• POSIX implementations exist for embedded systems
• Remarks
• The number of time a task is actually suspended
  depends on the details of the scheduling,
• The number of items is not a constant it may be
  data dependant
• Implementation of READ and WRITE access the
  buffer in chunks

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Raw KPN limitations

• KPN Models only a subset of possible behaviors
• No modeling of time nor timing constraints
• No modeling of asynchronous events
• arrival
• handling
• No modeling of non-determinism
• No dynamic task/channel creation

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Research Perspectives

• Design and evaluation of an lightweight SMP
  kernel to run parallel tasks on embedded
  multi-processors
• POSIX threads

• Real-time

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Conclusion

• Extended KPN Well suited to model data flow
  applications with data dependent control
• Scheduling of tasks automatically performed by
  data availability
• Task can migrate from hw to sw and vice-versa
  provided that communication is possible
• FIFO sizing influences performance, not behavior
• Automatic synthesis of communications (template
  library)
• Direct mapping of the SW tasks on embedded
  processors
• Direct synthesis of the HW tasks from the KPN
  spec. (UGH)
• Efficient implementation of the KPN simulation
  environment