Sequential networks automaton

1
Sequential networks automaton
An automaton
v2
v1
v ? V
y ? Y
v3
S2
/Y1
S1
/Y2
v2
v2
v1
v3
v1
v3
Y2
Y1
Y3
v1
v3
v1
S3
/Y3
v2
can be described by 
a) A set of input symbols, V (X)
and a set of outputs, Y
b) A set of states, S
c) A transition function, ?
d) An output function, ?
2
Transition and output functions
Transition function ? S ? X ? S
Output function
? S ? X ? Y (Mealy type of automaton)
Output is a function of both the present state
and the present input
? S ? Y (Moore type of automaton)
Output is a function of the present state
3
Transition table and state diagram
Transition/output table
Moore
Mealy
... state diagram
Moore type
Mealy type
4
Sequential circuit (FSMs)
FSM
combinational logic
CL
memory
M
Synchronization signal (clock)
CLK
Finite State Machines
Synchronous (Memory consists of elements
realized as FF)
Asynchronous (Synchronizing clock pulses are not
available)
5
Synchronous FSMs
x1 xn
y1 ym
CN
Q1 Qk
q1 qk
M
Flip-flops
CLK
6
Flip-flops
Flip-flop
Moore type automaton with two internal states,
one or two inputs, two outputs Q and
and synchronizing input
All FFs can be divided into four basic types D,
T, SR and JK.
7
Flip-flops

• Each flip-flop can be described by
• transition table,
• characteristic function (equation),
• excitation table.

8
Flip-flop transition tables
Characteristic function Q f(I1,I2,Q)
9
Flip-flop excitation tables
D delay
T trigger
When a logic 1 is applied to S, the FF is set to
1 (Q 1). When a logic 1 is applied to R, the
FF is reset to 0 (Q 0).
The JK FF has similar functions to an SR FF
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Timing diagram of D flip-flop
Q
11
Timing diagram of T flip-flop
Q
12
Timing diagrams for both FFs
Q (D)
Q (T)
13
Synthesis of sequential circuits

• Synthesis steps
• ? From a word description of the problem, form a
  state table
• ? Simplify the state table
• ? Assign the codes to the states (input and
  output symbols)
• ? Derive the excitation and output functions

minimization
state assignment
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Excitation and output functions
Q
Q
X
Y
FFs
CL in
CL out
CLK
Y f(Q) (Moore)
Q f(X,Q)
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Example (sequence detector)
Two flip-flops will be enough
The state assignment can have a big impact on
circuit complexity, but now we choose the state
assignment arbitrarily
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Solution with D flip-flops
17
Logic diagram with D flip-flops
x
Y
18
Solution with T flip-flops
0
1
0
1
0
1
1
0
1
Y as previously
19
Logic diagram with T flip-flops
Y as previously
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Solution with JK flip-flops
21
Logic diagram with JK flip-flops
Y as previously