Smart Card Overview

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Smart Card Overview ETRI 32-bit Smart Card SoC

• 2004.01.02
• Supercomputing Lab.
• Yang Hoonmo

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Contents

• Smart Card Overview
• Definition
• Type
• Architecture
• Application
• Smart Card the Present
• Smart Card Future Technology

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Smart Card Overview

• Smart Card
• Plastic card which contains microprocessor
  memory
• Can perform processing storing of data
• Card size(54.0x85.6mm), small chip size

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Smart Card Overview

• Categorization by Feature Component
• Memory vs. Processor Smart Card

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Smart Card Overview

• Categorization by Interface Type
• Contact
• Card physically contacts with a Card Reader and
  gets supply voltage and clock signal
• Suitable for high-security level application

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Smart Card Overview

• Categorization by Interface Type
• Contactless (Non-contact)
• Eliminates connection failure of contact type
• Get supply voltage and clock signal by using an
  embedded antenna
• Power Supply Mechanism
• close coupling capacitive coupling
• remote coupling inductive coupling
• Suitable for simple/fast transaction (a few
  hundred bytes)

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Smart Card Overview

• Categorization by Interface Type
• Dual Interface
• Has both contact and contacless interface
• Shared memory or non-shared memory

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Smart Card Overview

• Categorization by supply power source
• Active internal source
• embedded battery
• Passive external source
• contact or capacitive/inductive coupling

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Smart Card Overview

• Architecture

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Smart Card Overview

• Architecture - Example

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Smart Card Overview

• Architecture - Component
• Microprocessor
• 8bit, 16bit, 32bit microprocessor
• ROM
• Contains boot program
• RAM
• OS memory area ex. Stack Heap
• EEPROM
• Contains card operating system (COS) user data
• Cryptographic coprocessor (Optional)
• Acceleration of cryptogram algorithm

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Smart Card Overview

• Application Example
• Identification cards for mobile phones
• Signature cards
• Office identity cards
• Health application
• Loyalty service

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Smart Card Overview

• Smart Card in the Present (High-End)
• 32-bit RISC microprocessor
• Generally ARM7TDMI based
• Java-based platform
• Java Card technology API
• Java byte code downloadable
• New type of memory
• Usage of Flash or FeRAM

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Smart Card Overview

• Smart Card in the Present Example
• Samsung
• ST Micro
• ST16 Secure Smartcard ICs (8bit)
• ST19 Multi-Application Smartcard ICs (8bit)
• ST22J SmartJ Platform ICs (32bit)
• Motorola, Gemplus, Toshiba, Infineon

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Smart Card Overview

• Trend
• More processing power
• Support of multifunctional application
• Growing complexity of programs
• More memory
• Storing multiple application
• Storing more user data
• More Security
• Contactless operation

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Smart Card Overview

• Ongoing Future Technology
• Embedded within an accessory
• watch, key holder, ring, glasses
• Networking standard
• Bluetooth, WAP, Jini, NIM
• On-card display
• ultra-slim display device embedded in smart card
• Processing biometric information
• finger prints, human voice

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ETRI 32-Bit Smart Card SoC
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ETRI 32-bit Smart Card SoC

• A Platform-Based Design of a 32bit Smart Card
  (ETRI)
• Platform-Based Design
• Specification
• Verification Method
• Low Power technique
• Experimental Results

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ETRI 32-bit Smart Card SoC

• Platform-Based Design

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ETRI 32-bit Smart Card SoC

• Specification

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ETRI 32-bit Smart Card SoC

• Block Diagram of ETRI Smart Card SoC

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ETRI 32-bit Smart Card

• Verification Method
• Verify the functionality of the major hardware
  modules with their own test vectors
• SoC verification - Problem
• Requires billions of test cycles
• Generating good test vectors covering all
  situations of smart card functions is very
  difficult
• SoC verification Substitution
• Behavioral models for contact and contactless
  card readers that mimic the behaviors of the
  readers
• ModelSim and Seamless CVE for RTL sim and S/W
  debugging

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ETRI 32-bit Smart Card

• Verification Environment

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ETRI 32-bit Smart Card

• Low power considerations
• Clock gating
• mainly for cryptographic coprocessor
• RSA 5 registers of 1024bits and a 32bit
  register
• ECC 8 registers of 164bits and a 32bit register
• Gate level optimization (by synthesis tool)
• Buss stopping when module is not used

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ETRI 32-bit Smart Card

• Experimental Result Performance (execution time
  in ms)

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ETRI 32-bit Smart Card

• Experimental Result Gate Count Power

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• fin.