Electronics for the LHCb Outer Tracking Detector

1
Electronics for the LHCb Outer Tracking Detector

• Dirk Wiedner
• Physics Institute
• University of Heidelberg
• Germany

2
LHCb
CERN Switzerland
3
Outer Tracker
Ionising particle
200 µm resolution
4
Electronics Placement
tot. dose lt 10krad
Front end box 128 channels 16 ASDBLR
amplifiers 4 OTIS TDC chips 1 optical
link 1.6 Gbit/s
Outer Tracker 3 Stations 56000 channels 432 FE
boxes 432 optical links
5
Electronics Scheme
Amplifier
TDC
optical link
OTIS-TDC L0 Buffer
0-Supp.
GOL
DAQ (PCs)
ASD
100m
200 fC
threshold
Fast Control
counting room
FE Electronics on the detector
Power / Control
Electronics Service Box
6
Electronic Components in FE-Box
x1

• GOL Gigabit Optical Link
• OTIS Outer Tracker Time Information System
• ASD Amplifier Shaper Discriminator
• HV High Voltage

x4
x8
x4
432 FE-Boxes
7
HV-Boards

• 32 channels / board
• Compact capacitors
• Operation in air
• casting/embedding of caps

Capacitors JOHANSON 302R29W331KV4E Max. Volt.
4kV Size 4.6 x 2 x 1.5 mm3
8
Casting embedding Technology

• Severe technological problems in the beginning
• Imperfect soldering procedure
• Hand re-work

Mechanical stress and damage of caps
Meanwhile (several iterations) technology is
well understood
9
Production Testing
Yield of 80 expected, 85 yield reached already
10
ASD Board
TDC

• Amplifier Shaper Discriminator with Base Line
  Restoration
• 10 ns shaping time
• 1 fC sensitivity
• 8 channels
• Designed for ATLAS detector
• Total need of 7 200 chips
• 28 896 chips available

Ground springs
HV Board
11
ASDBLR Testing
Eff

• Chips categorized
• pre-selection
• current consumption
• broken channels etc.
• ?62.2 accepted
• performance
• threshold spread checked
• ?32 best chips chosen

0.5
Half Efficiency Vthr50
12
OTIS TDC

• 32 channel ASIC TDC
• 1 ns drift time resolution
• 75 ns max. drifttime
• single and multi-hit
• radiation tolerant
• on chip L0 buffer
• 2000 TDCs needed

13
OTIS Wafer Test
not processed
good

• 47 wafers received 11/05
• A wafer includes
• 78 processed OTIS 1.2
• 78 processed OTIS 1.3

14
Test Procedure

• Power consumtion ok? (Ilt300 mA _at_ 2.5V)
• Slow control test Check position ID and
  registers
• FPGA test
• Chip alive?
• Header ok?
• All channels alive?
• Measurement of Differential No Linearity for ch.
  0,15,16,31
• DNL lt 2.0 bins for OTIS 1.2 ) 1 bin 0.39
  ns
• DNL lt 1.9 bins for OTIS 1.3
• L0 buffer overflow recognized?
• DACs functional

15
Wafer Test on FPGA

• gt4 000 000 data sets per chip (7332 chips)
• 1 MHz data rate (288 MBit/s)
• Data analysis on FPGA
• Histograms on FPGA internal memory
• Drift time
• Event counter
• Channel map

16
Wafer Test Results

• Overall yield
• OTIS 1.2 88.65 ?3250 functional
• OTIS 1.3 91.53 ?3284 functional
• 2000 chips needed
• Chips are inked and sawed

17
OTIS Board
GOL/Aux

• Chip on board technology
• Cooling
• 100 µm copper plane
• Noise reduction
• Air coils
• Differential in and outputs

ASD
ASD
18
GOL-Auxiliary Board

• GOL 1.0 serializer for 128 straw channels
• QPLL 3 clock filter
• TFC signal distribution
• I2C signal distribution
• LV-power regulators

19
GOL-AUX challenges

• Oscillating regulators
• extra 100 µF at in and outputs
• Bad clock from outside
• Radiation hard clock filter with lt45 ps jitter
  pk-pk
• Rad hard differential signal distribution
• Resistor network for current division

20
GOL-Aux Testing

• checks
• LV ripple (lt40 mV)
• Fast and slow control distribution
• TDC data after optical transmission
• Eye pattern (optical)

21
Front End Tester

• Test of full FE-box
• Amplifier threshold characteristics
• 50mV deviation exp.
• Timing performance
• 0.4 ns RMS typ.

22
Optical Link
TDC L0 Buffer
0-supp.
GOL
DAQ
ASD
O-Rx
100m
200 fC
bias
L0 BX
counting room
FE Electronics on the detector
LV
HV
TFC
ECS
Cooling
Power / Control
Electronics Service Box
23
O-RxCard

• 12 way optical receiver
• commercial deserializers
• high density connector to TELL1
• 19.2 GBit/s

24
O-RxCard

• O-RxCard now LHCb wide used
• Final production carried out by Tsinghua
  University
• All boards produced
• Testing ongoing

25
O-RxCard BERT

• Bit error rate tested vs. optical attenuation
• 6 dB extra attenuation Ok
• lt 10 errors in 1012 Bit at 9 dB attenuation in
  production test

26
e- Test Beam
Feb. 2005, DESY Hamburg electron beam 6 GeV
readout
silicon tracker
beam
scintillator
scintillator
1 2 3 4 0 1 2
3 4 5 6 7
module layer
27
Efficiency
Efficiency
28
Track resolution vs. HV
Resolution µm
29
Test beam conclusion

• resolution lt 200 µm
• Efficiency gt 98
• Complete read out chain with 4 FE boxes used
• Readout fully functional, performance as
  specified

30
Summary

• Excellent performance of full readout electronic
• All custom amplifiers and TDC produced and
  tested, good yield
• Production of all electronic boards has started,
• 7 of each type of board produced and tested

31
Outlook
Oct nov dec jan feb
mar apr may jun
jul aug sep oct
nov
Ship to CERN
Module Finishing, S-Module Coupling etc.
Install
metallic structure production
aug sep oct nov
Start LHCb global commissioning
2005 2006