Title: 15-213
115-213The course that gives CMU its Zip!
Integer Arithmetic OperationsSept. 3, 1998
- Topics
- Basic operations
- Addition, negation, multiplication
- Programming Implications
- Consequences of overflow
- Using shifts to perform power-of-2
multiply/divide
class04.ppt
CS 213 F98
2C Puzzles
- Taken from Exam 2, CS 347, Spring 97
- Assume machine with 32 bit word size, twos
complement integers - For each of the following C expressions, either
- Argue that is true for all argument values
- Give example where not true
- x lt 0 ??? ((x2) lt 0)
- ux gt 0
- x 7 7 ??? (xltlt30) lt 0
- ux gt -1
- x gt y ??? -x lt -y
- x x gt 0
- x gt 0 y gt 0 ??? x y gt 0
- x gt 0 ?? -x lt 0
- x lt 0 ?? -x gt 0
Initialization
int x foo() int y bar() unsigned ux
x unsigned uy y
3Unsigned Addition
u
Operands w bits
v
True Sum w1 bits
u v
Discard Carry w bits
UAddw(u , v)
- Standard Addition Function
- Ignores carry output
- Implements Modular Arithmetic
- s UAddw(u , v) u v mod 2w
4Visualizing Integer Addition
- Integer Addition
- 4-bit integers u and v
- Compute true sum Add4(u , v)
- Values increase linearly with u and v
- Forms planar surface
Add4(u , v)
v
u
5Visualizing Unsigned Addition
- Wraps Around
- If true sum 2w
- At most once
Overflow
UAdd4(u , v)
True Sum
Overflow
Modular Sum
v
u
6Mathematical Properties
- Modular Addition Forms an Abelian Group
- Closed under addition
- 0 UAddw(u , v) 2w 1
- Commutative
- UAddw(u , v) UAddw(v , u)
- Associative
- UAddw(t, UAddw(u , v)) UAddw(UAddw(t, u ),
v) - 0 is additive identity
- UAddw(u , 0) u
- Every element has additive inverse
- Let UCompw (u ) 2w u
- UAddw(u , UCompw (u )) 0
7Detecting Unsigned Overflow
- Task
- Given s UAddw(u , v)
- Determine if s u v
- Application
- unsigned s, u, v
- s u v
- Did addition overflow?
- Claim
- Overflow iff s lt u
- ovf (s lt u)
- Or symmetrically iff s lt v
- Proof
- Know that 0 v lt 2w
- No overflow gt s u v u 0 u
- Overflow gt s u v 2w lt u 0 u
No Overflow
Overflow
8Twos Complement Addition
u
Operands w bits
v
True Sum w1 bits
u v
Discard Carry w bits
TAddw(u , v)
- TAdd and UAdd have Identical Bit-Level Behavior
- Signed vs. unsigned addition in C
- int s, t, u, v
- s (int) ((unsigned) u (unsigned) v)
- t u v
- Will give s t
9Characterizing TAdd
- Functionality
- True sum requires w1 bits
- Drop off MSB
- Treat remaining bits as 2s comp. integer
PosOver
NegOver
10Visualizing 2s Comp. Addition
NegOver
- Values
- 4-bit twos comp.
- Range from -8 to 7
- Wraps Around
- If sum 2w1
- Becomes negative
- At most once
- If sum lt 2w1
- Becomes positive
- At most once
TAdd4(u , v)
v
PosOver
u
11Detecting 2s Comp. Overflow
- Task
- Given s TAddw(u , v)
- Determine if s Addw(u , v)
- Example
- int s, u, v
- s u v
- Claim
- Overflow iff either
- u, v lt 0, s 0 (NegOver)
- u, v 0, s lt 0 (PosOver)
- ovf (ult0 vlt0) (ult0 ! slt0)
- Proof
- Easy to see that if u 0 and v lt 0, then TMinw
u v TMaxw - Symmetrically if u lt 0 and v 0
- Other cases from analysis of TAdd
12Mathematical Properties of TAdd
- Isomorphic Algebra to UAdd
- TAddw(u , v) U2T(UAddw(T2U(u ), T2U(v)))
- Since both have identical bit patterns
- Twos Complement Under TAdd Forms a Group
- Closed, Commutative, Associative, 0 is additive
identity - Every element has additive inverse
- Let TCompw (u ) U2T(UCompw(T2U(u ))
- TAddw(u , TCompw (u )) 0
13Twos Complement Negation
- Mostly like Integer Negation
- TComp(u) u
- TMin is Special Case
- TComp(TMin) TMin
- Negation in C is Actually TComp
- mx -x
- mx TComp(x)
- Computes additive inverse for TAdd
- x -x 0
Tcomp(u )
u
14Negating with Complement Increment
- In C
- x 1 -x
- Complement
- Observation x x 1111112 -1
- Increment
- x x (-x 1) -1 (-x 1)
- x 1 -x
- Warning Be cautious treating ints as integers
- OK here We are using group properties of TAdd
and TComp
15Comp. Incr. Examples
x 15213
TMin
0
16Comparing Twos Complement Numbers
- Task
- Given signed numbers u, v
- Determine whether or not u gt v
- Return 1 for numbers in shaded region below
- Bad Approach
- Test (uv) gt 0
- TSub(u,v) TAdd(u, TComp(v))
- Problem Thrown off by either Negative or
Positive Overflow
17Comparing with TSub
- Will Get Wrong Results
- NegOver u lt 0, v gt 0
- but u-v gt 0
- PosOver u gt 0, v lt 0
- but u-v lt 0
NegOver
TSub4(u , v)
v
u
PosOver
18Working Around Overflow Problems
- Partition into Three Regions
- u lt 0, v 0 ? u lt v
- u, v same sign ? u-v does not overflow
- Can safely use test (uv) gt 0
19Multiplication
- Computing Exact Product of w-bit numbers x, y
- Either signed or unsigned
- Ranges
- Unsigned 0 x y (2w 1) 2 22w 2w1
1 - Up to 2w bits
- Twos complement min x y (2w1)(2w11)
22w2 2w1 - Up to 2w1 bits
- Twos complement max x y (2w1) 2 22w2
- Up to 2w bits, but only for TMinw2
- Maintaining Exact Results
- Would need to keep expanding word size with each
product computed - Done in software by arbitrary precision
arithmetic packages - Also implemented in Lisp, ML, and other
advanced languages
20Unsigned Multiplication in C
u
Operands w bits
v
u v
True Product 2w bits
UMultw(u , v)
Discard w bits w bits
- Standard Multiplication Function
- Ignores high order w bits
- Implements Modular Arithmetic
- UMultw(u , v) u v mod 2w
21Unsigned vs. Signed Multiplication
- Unsigned Multiplication
- unsigned ux (unsigned) x
- unsigned uy (unsigned) y
- unsigned up ux uy
- Truncates product to w-bit number up
UMultw(ux, uy) - Simply modular arithmetic
- up ux ? uy mod 2w
- Twos Complement Multiplication
- int x, y
- int p x y
- Compute exact product of two w-bit numbers x, y
- Truncate result tow-bit number p TMultw(x, y)
- Relation
- Signed multiplication gives same bit-level result
as unsigned - up (unsigned) p
22Multiplication Examples
short int x 15213 int txx ((int)
x) x int xx (int) (x x) int
xx2 (int) (2 x x)
x 15213 00111011
01101101 txx 231435369 00001101 11001011
01101100 01101001 xx 27753 00000000
00000000 01101100 01101001 xx2 -10030
11111111 11111111 11011000 11010010
- Observations
- Casting order important
- If either operand int, will perform int
multiplication - If both operands short int, will perform short
int multiplication - Really is modular arithmetic
- Computes for xx 152132 mod 65536 27753
- Computes for xx2 (int) 55506U -10030
- Note that xx2 (xx ltlt 1)
23Power-of-2 Multiply with Shift
- Operation
- u ltlt k gives same result as u 2k
- Both signed and unsigned
- Examples
- u ltlt 3 u 8
- u ltlt 5 - u ltlt 3 u 24
- Most machines shift and add much faster than
multiply - Compiler will generate this code automatically
k
u
Operands w bits
2k
0
0
1
0
0
0
u 2k
True Product wk bits
0
0
0
UMultw(u , 2k)
0
0
0
Discard k bits w bits
TMultw(u , 2k)
24Unsigned Power-of-2 Divide with Shift
- Quotient of Unsigned by Power of 2
- u gtgt k gives same result as ? u / 2k ?
- Uses logical shift
k
u
Binary Point
Operands
2k
/
0
0
1
0
0
0
u / 2k
Division
.
0
0
0
?u / 2k?
Quotient
0
0
0
252s Comp Power-of-2 Divide with Shift
- Quotient of Signed by Power of 2
- u gtgt k almost gives same result as ? u / 2k ?
- Uses arithmetic shift
- Rounds wrong direction when u lt 0
26Properties of Unsigned Arithmetic
- Unsigned Multiplication with Addition Forms
Commutative Ring - Addition is commutative group
- Closed under multiplication
- 0 UMultw(u , v) 2w 1
- Multiplication Commutative
- UMultw(u , v) UMultw(v , u)
- Multiplication is Associative
- UMultw(t, UMultw(u , v)) UMultw(UMultw(t, u
), v) - 1 is multiplicative identity
- UMultw(u , 1) u
- Multiplication distributes over addtion
- UMultw(t, UAddw(u , v)) UAddw(UMultw(t, u ),
UMultw(t, v))
27Properties of Twos Comp. Arithmetic
- Isomorphic Algebras
- Unsigned multiplication and addition
- Truncating to w bits
- Twos complement multiplication and addition
- Truncating to w bits
- Both Form Rings
- Isomorphic to ring of integers mod 2w
- Comparison to Integer Arithmetic
- Both are rings
- Integers obey ordering properties, e.g.,
- u gt 0 ? u v gt v
- u gt 0, v gt 0 ? u v gt 0
- These properties are not obeyed by twos
complement arithmetic - TMax 1 TMin
- 15213 30426 -10030
28C Puzzle Answers
- Assume machine with 32 bit word size, twos
complement integers - TMin makes a good counterexample in many cases
- x lt 0 ?? ((x2) lt 0) False TMin
- ux gt 0 True 0 UMin
- x 7 7 ?? (xltlt30) lt 0 True x1 1
- ux gt -1 False 0
- x gt y ?? -x lt -y False -1, TMin
- x x gt 0 False 30426
- x gt 0 y gt 0 ?? x y gt 0 False TMax, TMax
- x gt 0 ?? -x lt 0 True TMax lt 0
- x lt 0 ?? -x gt 0 False TMin