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Total Ionizing Dose Effects in Silicon Technologies and Devices

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Title: Total Ionizing Dose Effects in Silicon Technologies and Devices


1
Total Ionizing Dose Effects in Silicon
Technologies and Devices
  • Hugh Barnaby, Philippe Adell, Jie Chen, Michael
    Mclain, Ivan Sanchez, Harshit Shah
  • Arizona State University
  • Jet Propulsion Laboratory

2
Topics
  • Modeling total ionizing dose effects in deep
    submicron bulk CMOS technologies - Hugh Barnaby,
    ASU
  • Band-to-band tunneling (BBT) induced leakage
    current enhancement in irradiated fully depleted
    SOI devices - Philippe Adell, JPL
  • Mechanisms of enhanced radiation-induced
    degradation due to excess molecular hydrogen in
    bipolar oxides - Jie Chen, ASU

3
Modeling Total Ionizing Dose Effects in Deep
Submicron Bulk CMOS technologies
  • Hugh Barnaby, Michael Mclain, Ivan Sanchez,
    Harshit Shah
  • Department of Electrical Engineering
  • Ira A. Fulton School of Engineering
  • Arizona State University

4
ASU task
  • Characterize and model TID effects in bulk deep
    submicron CMOS devices
  • Design and build radiation-enabled compact models
  • Technologies deep sub-micron bulk CMOS, silicon
    on insulator, device isolation structures (STI,
    BOX)

5
Reliability threats
  • Traditional
  • Hot-Carrier-Injection (HCI)
  • Nanoscale roadblock
  • Negative-bias-temperature-instability (NBTI)
  • Other issues
  • TDDB, etc.

after N. Kimizuka et al., VLSI Tech. 1999
6
Radiation threats in bulk CMOS
Radiation damage in shallow trench oxides
increases leakage
Intra-device leakage
Inter-device leakage
7
TID Defects
Defects
  • Not - oxide trapped charge (E )
  • Nit interface traps (Pb)

Both Nit and Not are related to holesgenerated
and/or hydrogen present inoxide
first orderassumption
Not, Nit a tox
8
Research Goal
To develop a compact modeling approach that
cansimulate and predict the effects of stress
and radiationdamage of semiconductor devices and
circuits?
9
Research Goal
To develop a compact modeling approach that
cansimulate and predict the effects of stress
and radiationdamage of semiconductor devices and
circuits?
This capability, known as Predictive
TechnologyModeling (PTM), has been demonstrated
formodeling negative bias temperature
instability.
10
Predictive technologymodeling (PTM)
  • The goal of PTM is to develop compactmodeling
    approaches that are
  • Scalable with technology and design parameters
  • Capable of both short-term and long-term
    predictions
  • Compatible with standard circuit simulator
  • Extendable to emerging reliability and
    radiationeffects concerns

11
PTM Approach (for NBTI)
Model validation path
Circuit simulationwith ageing effects
Modeling inputs
12
Model validation
  • Model verified with published silicon data
  • Excellent scalability over process and design
    conditions

After Vattikonda et al. DAC 2006.
13
Research Goal
To develop a compact modeling approach that
cansimulate and predict the effects of stress
and radiationdamage of semiconductor devices and
circuits?
This capability, known as Predictive
TechnologyModeling (PTM) has already been
demonstrated formodeling negative bias
temperature instability at ASU.
Our goal is to extend PTM for reliability to
captureradiation effects
14
PTM Approach (for TID)
Radiation-enabledcircuit simulation
Modelinginputs
15
Radiation-enabled PTM(Physical Module)
Inputs
Physical Module
Output(defects)
Model validation
16
Closed form model for TID
  • Oxide trapped charge dependence on dose, oxide
    field and thickness.
  • Interface trap dependence on dose, oxide field
    and thickness.

Model Parameters
Models based onassumptions of steady state,
uni-directional flux, andno saturation
orannealing
D - total dose rad kg - 8.1 x 1012
ehp/radcm3 fy - field dependent hole yield
hole/ehp fot - trapping efficiency trapped
hole/hole fDH - hole, DH reaction efficiency
H/hole fit - H, SiH de-passivation efficiency
interface trap/H tox - oxide thickness cm
See Barnaby, MURI presentation 2006
17
Simple Model Not(x)
Vg
  • The simple model requires
  • Doping distribution along sidewall togenerate
    NA(i) and fMS(i) arrays
  • Field line estimates to generatetox(i) and
    eox(i) arrays
  • Vgb bias condition

tox(i)
eox(i)

x(i)

NA(i)
x(i1)
STI
to compute the e-field.
x
Vb
E-field a functionof Not (iterative)
Surface potential
18
Non-uniform doping
Sidewalldoping
In deep submicron CMOS, the doping along
thesidewall is highly non-uniform
19
TCAD Modeling
TCAD modeling with the Silvaco REM simulator can
generate volumetricdistributions of trapped
charge in the STI (for model validation).
1 krad
10 krad
100 krad
20
Not estimates
Vgb 1V
100 krad
10 krad
Vgb 0V
10krad dose
1 krad
Vgb 0V
Simulator predicts dose and bias dependence (as
well as temperature,dose rate, etc.).
21
Radiation-enabled PTM(Compact modeling)
22
Compact Modeling for TID(surface potential)
Nit, Not from phys. mod.
ys(x,y)
Surface potential information is used in the PSP
compact model being developed and refined at ASU.
23
Compact Modeling for TID(drain-source leakage)
MR2
MR1
Effect of charge buildup along STI sidewall
degrades can be modeled as two parasitic nMOSFETs
(MR1 and MR2) operating in parallel with as drawn
device, MA.D.
24
D-S leakage model usingBSIM4 compact model
MR1
Parameters in modified BSIM4 model
enablesparasitic devices to be modeled
MR2
model nfetMR1_10MRAD bsim4 typen (W50.1nm
L120nm) tnom 27 toxe
12.46e-009 toxp 1.1e-9 rnoia 0.577
rnoib 0.37 vth0 0.20439 cdsc
0 cdscb 0 cdscd 0 cit
-0.00161 u0 0.026 ua 1e-10 ub
4e-16
MA.D.
25
Modeling bias dependence withBSIM4
26
Circuit Level Modeling(A/D Converter)
Flash-type ADC
  • Compact (C-) models, degradedas function of dose
    andradiation bias, are used byEDA tools to
    model circuit degradation over time.
  • C-models can be inserted at the circuit-level
    (SPICE/SPECTRE) or in higher level behavioral
    models for increased efficiency.

27
Circuit Level Modeling(results)
Modeled application response to intra-device
leakage understatic radiation bias conditions
after Mikkola et al. RADECS 2006
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