Impact of Different Parameters on MultiCore Architecture Performance

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Impact of Different Parameters on MultiCore Architecture Performance

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The total number of parameters which affect the performance are very high, so it ... the work load as well as to activate and deactivate the cores on a multi core ... –

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Title: Impact of Different Parameters on MultiCore Architecture Performance


1
Impact of Different Parameters on Multi-Core
Architecture Performance
  • Seetharamayya Akella
  • Sandeep Talasila
  • Karthikeyan Gopaluni
  • Srikanth Bandaru

2
Outline
  • Importance of the study of parameters
  • Classification of parameter Variations
  • Process Variations
  • Voltage Variations
  • Temperature Variations
  • Conclusion

3
Challenges..!
Core Power
Increase in Frequency
Thermal-aware throttling
Speed
Power
Temperature
Leakage dependence on Temperature
4
Importance of the study of parameters
  • Computer architects depend heavily on simulation
    process to find out whether the proposed
    architecture would improve the performance of the
    system or not
  • The total number of parameters which affect the
    performance are very high, so it practically
    requires large amount of time to cater for all
    the parameters.

5
Advantage
  • Clear idea on which parameter has more impact on
    the performance
  • One can optimize the hardware for achieving the
    same performance

6
General Simulation Process
  • In general experiments are carried out by varying
    one parameter and keeping rest of the parameters
    as constant.
  • Disadvantages of the above approach are
  • Masking due to parameter interactions
  • High level of masking? overshadowing

7
Solution
  • Parameter Correlation Matrix (PCM)
  • Divide the processor into independent units and
    examine the interactions within them.
  • Identify the sub units. For example in an
    instruction fetch unit we have instruction cache
    (I-cache), prefetch buffer, I-buffer, branch
    predictor (BP), and instruction TLB (I-TLB).
  • Step three identifies sub metrics defining
    performance and costs of subunits.

8
Parameter Variations
Temperature Variations
Voltage Variations
Process Variations
9
Process Variation types
  • Die-Die Variations
  • Wafer-Wafer Variations
  • With in Die Variations

10
Process Variations -- categories
  • Spatially Correlated variations where devices
    close to each other have a high probability of
    observing a similar variation level
  • Random Variations causing random differences
    between various devices with in die

11
Impact of Process Variations
  • Process variations cause maximum clockable
    frequency and power dissipation of a
    high-performance chip to vary from the target
    frequency and from chip to chip.

12
Effect of process variations on execution cycles
13
Pipeline Adaption to tolerate process variation
14
 Advantages
  • To enable high frequency and long pipelines
  • To push the slack of non-critical loops to the
    loops feed back paths which can be used to reduce
    the power
  • This is a special case of the use of recycle
    which is to salvage chips that would otherwise be
    rejected due to variation induced hold-time
    failures.

15
Voltage variations
  • Mainly due to different work loads and current
    profiles.
  • Current profiles are classified into three types
  • Step Currents
  • Pulse Currents
  • Resonating Currents

16
Step Currents
  • This type of current profile mainly occurs when a
    core suddenly changes state (switching ON/OFF).
  • Current steps can induce large voltage
    fluctuations around the nominal voltage.
  • The inter-core delay for switching on the cores
    is called Stagger interval.

17
  • Adjusting the inter-core delay is called as
    staggering mechanism.
  • The staggering mechanism proved that increasing
    the switching period between cores can reduce
    voltage fluctuations.

18
Temperature Variations
  • The computer hardware generates lot of heat
    because at the individual component level we
    always generate an output which is either
    selected or deselected depending upon the
    operation which we are performing.

19
  • As the power dissipation varies dynamically the
    temperature of the cores vary.
  • It is necessary to control the temperature
    variations as it directly effects the operation
    of individual transistors inside the core.

20
Reliability-Aware Power Management
  • To divide the work load as well as to activate
    and deactivate the cores on a multi core system
    we need a middle ware which is named as Self
    Distributing Virtual Machine (SDVM).
  • The functions of this unit are
  • Resizing the clusters
  • Automatic load balancing

21
Two PMs for simulation
  • The low temperature policy
  • Tries to keep the temperature as
  • low as possible.
  • The smooth temperature policy
  • Tries to restrict thermal cycling.

22
Results
23
Conclusion
  • Importance of Parameter variations
  • Effect of parameter variations on multi-core
    performance and solutions to attain the desired
    operation with reliability.
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