Computer Architecture I: Digital Design

1
Computer Architecture I Digital Design Dr.
Robert D. Kent
Logic Design Decoders and Multiplexers
2
Review

• We have begun to study logic design in the
  contexts of Medium Scale Integration (MSI) of
  gate devices and programmable logic devices
  (PLD).
• We have studied the design of a number of
  specific, practical functional circuits,
  expressed in terms of Boolean expressions and
  their equivalent logic gates (SSI Small Scale
  Integration) with a view to re-using those
  circuits as components in MSI design.
• 1-bit Half-Adder 1-bit Full-Adder
• Multi-bit Ripple Adder Subtractor
• Decade Adder Comparator

3
Goals

• We continue our study of simple, but functional
  Combinational circuits, namely Decoders/Encoders,
  Multiplexers, and PLD/PLA circuits
• we continue constructing a small library of
  useful components
• through study of the solution process using
  Boolean algebra and Boolean calculus
  (simplification, etc.) we better understand the
  meaning of SSI design
• we seek to identify these components for their
  re-use potential
• through our study we will better understand how
  MSI increases the level of abstraction in solving
  problems - SSI design is relatively concrete.

4
Circuit 9 Decoders
5
Circuit 9 Decoders

• Decoders are most often used to transform one
  type of coding to another.
• Change data representations
• Design of address bus networks (specify an
  address to obtain data)

6
Circuit 9 Decoders

• Decoders are most often used to transform one
  type of coding to another.
• Change data representations
• Design of address bus networks
• A decoder is a multi-input, multi-output logic
  network.

7
Circuit 9 Decoders

• Decoders are most often used to transform one
  type of coding to another.
• Change data representations
• Design of address bus networks
• A decoder is a multi-input, multi-output logic
  network.
• Typically with N inputs and 2N outputs.

8
Circuit 9 Decoders

• Decoders are most often used to transform one
  type of coding to another.
• Change data representations
• Design of address bus networks
• A decoder is a multi-input, multi-output logic
  network.
• Typically with N inputs and 2N outputs.
• Other types of N-to-M decoders are alsoused,
  where M lt 2N.

9
Circuit 9a Simple Decoder

• The simplest decoder has N inputs and 2N
  outputs.
• The set of all N inputs is interpreted as an
  unsigned binary number that, in turn, selects a
  particular output line to output a value 1 with
  all other output lines having value 0.

10
Circuit 9a Simple Decoder

• The simplest decoder has N inputs and 2N
  outputs.
• The set of all N inputs is interpreted as an
  unsigned binary number that, in turn, selects a
  particular output line to output a value 1 with
  all other output lines having value 0.
• Example a 2-line input to 4-line output
  decoder

11
Circuit 9a Simple Decoder

• The simplest decoder has N inputs and 2N
  outputs.
• The set of all N inputs is interpreted as an
  unsigned binary number that, in turn, selects a
  particular output line to output a value 1 with
  all other output lines having value 0.
• Example a 2-line input to 4-line output
  decoderTruth table Label the outputs DK,
  noting that the subscript value, K, is just the
  (unsigned) binary value Kradix-2 x1 x0. Only
  one output line 1 at a time.x1 x0 D0 D1
  D2 D3 0 0 1 0 0 0 0 1
  0 1 0 0 1 0 0 0 1 0 1 1
  0 0 0 1

12
Circuit 9a Simple Decoder

• The simplest decoder has N inputs and 2N
  outputs.
• The set of all N inputs is interpreted as an
  unsigned binary number that, in turn, selects a
  particular output line to output a value 1 with
  all other output lines having value 0.
• Example a 2-line input to 4-line output
  decoderTruth table Label the outputs DK,
  noting that the subscript value, K, is just the
  (unsigned) binary value Kradix-2 x1 x0. Only
  one output line 1 at a time.x1 x0 D0 D1
  D2 D3 0 0 1 0 0 0 D0
  x1 x0 0 1 0 1 0 0 D1 x1 x0
  1 0 0 0 1 0 D2 x1 x0 1
  1 0 0 0 1 D3 x1 x0

13
Circuit 9a Simple Decoder

• The simplest decoder has N inputs and 2N
  outputs.
• The set of all N inputs is interpreted as an
  unsigned binary number that, in turn, selects a
  particular output line to output a value 1 with
  all other output lines having value 0.
• Example a 2-line input to 4-line output
  decoderD0 x1 x0 D1 x1 x0 D2 x1
  x0 D3 x1 x0

14
Circuit 9a Simple Decoder

• The simplest decoder has N inputs and 2N
  outputs.
• The set of all N inputs is interpreted as an
  unsigned binary number that, in turn, selects a
  particular output line to output a value 1 with
  all other output lines having value 0.
• Example a 2-line input to 4-line output
  decoderD0 x1 x0 D1 x1 x0 D2 x1
  x0 D3 x1 x0

15
Circuit 9b Simple Decoder

• The simplest decoder has N inputs and 2N
  outputs.
• The set of all N inputs is interpreted as an
  unsigned binary number that, in turn, selects a
  particular output line to output a value 1 with
  all other output lines having value 0.
• We consider the example of a 3-input, 8-output
  decoder.

16
Circuit 9b Simple Decoder

• The simplest decoder has N inputs and 2N
  outputs.
• The set of all N inputs is interpreted as an
  unsigned binary number that, in turn, selects a
  particular output line to output a value 1 with
  all other output lines having value 0.
• We consider the example of a 3-input, 8-output
  decoder.x2 x1 x0 z0 z1 z2 z3 z4 z5
  z6 z7 0 0 0 1 0 0 0 0 0 0
  0 0 0 1 0 1 0 0 0 0 0 0 0
  1 0 0 0 1 0 0 0 0 0 0 1 1
  0 0 0 1 0 0 0 0 1 0 0 0
  0 0 0 1 0 0 0 1 0 1 0 0 0
  0 0 1 0 0 1 1 0 0 0 0 0 0
  0 1 0 1 1 1 0 0 0 0 0 0
  0 1

17
Circuit 9b Simple Decoder

• The simplest decoder has N inputs and 2N
  outputs.
• The set of all N inputs is interpreted as an
  unsigned binary number that, in turn, selects a
  particular output line to output a value 1 with
  all other output lines having value 0.
• We consider the example of a 3-input, 8-output
  decoder.x2 x1 x0 z0 z1 z2 z3 z4 z5
  z6 z7 0 0 0 1 0 0 0 0 0 0
  0 0 0 1 0 1 0 0 0 0 0 0 0
  1 0 0 0 1 0 0 0 0 0 0 1 1
  0 0 0 1 0 0 0 0 1 0 0 0
  0 0 0 1 0 0 0 1 0 1 0 0 0
  0 0 1 0 0 1 1 0 0 0 0 0 0
  0 1 0 1 1 1 0 0 0 0 0 0
  0 1

Note that each output, ZJ, is characterized by a
single 1-value that can be immediately
represented as a single minterm.
18
Circuit 9b Simple Decoder

• The simplest decoder has N inputs and 2N
  outputs.
• The set of all N inputs is interpreted as an
  unsigned binary number that, in turn, selects a
  particular output line to output a value 1 with
  all other output lines having value 0.
• We consider the example of a 3-input, 8-output
  decoder.x2 x1 x0 z0 z1 z2 z3 z4 z5
  z6 z7 0 0 0 1 0 0 0 0 0 0
  0 0 0 1 0 1 0 0 0 0 0 0 0
  1 0 0 0 1 0 0 0 0 0 0 1 1
  0 0 0 1 0 0 0 0 1 0 0 0
  0 0 0 1 0 0 0 1 0 1 0 0 0
  0 0 1 0 0 1 1 0 0 0 0 0 0
  0 1 0 1 1 1 0 0 0 0 0 0
  0 1

19
Circuit 9b Simple Decoder

• The simplest decoder has N inputs and 2N
  outputs.
• The set of all N inputs is interpreted as an
  unsigned binary number that, in turn, selects a
  particular output line to output a value 1 with
  all other output lines having value 0.
• We consider the example of a 3-input, 8-output
  decoder.x2 x1 x0 z0 z1 z2 z3 z4 z5
  z6 z7 0 0 0 1 0 0 0 0 0 0
  0 0 0 1 0 1 0 0 0 0 0 0 0
  1 0 0 0 1 0 0 0 0 0 0 1 1
  0 0 0 1 0 0 0 0 1 0 0 0
  0 0 0 1 0 0 0 1 0 1 0 0 0
  0 0 1 0 0 1 1 0 0 0 0 0 0
  0 1 0 1 1 1 0 0 0 0 0 0
  0 1

minterms
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Circuit 9b Simple Decoder

• The decoder that we have developed is called a
  minterm generator decoder.

21
Circuit 9b Simple Decoder

• The decoder that we have developed is called a
  minterm generator decoder.
• This type of MSI circuit is particularly valuable
  for constructing other types of circuits, based
  on the use of minterm expressions

22
Circuit 9b Simple Decoder

• The decoder that we have developed is called a
  minterm generator decoder.
• This type of MSI circuit is particularly valuable
  for constructing other types of circuits, based
  on the use of minterm expressions
• Example Consider two functionsF(X2 X1 X0)
  Sum m(1,2,4,5)G(X2 X1 X0) Sum m(1,5,7)

23
Circuit 9b Simple Decoder

• The decoder that we have developed is called a
  minterm generator decoder.
• This type of MSI circuit is particularly valuable
  for constructing other types of circuits, based
  on the use of minterm expressions
• Example Consider two functionsF(X2 X1 X0)
  Sum m(1,2,4,5)G(X2 X1 X0) Sum m(1,5,7)
• These can be constructed immediately using the
  decoderand or gates.

24
Circuit 9b Simple Decoder

• The decoder that we have developed is called a
  minterm generator decoder.
• This type of MSI circuit is particularly valuable
  for constructing other types of circuits, based
  on the use of minterm expressions
• Example Consider two functionsF(X2 X1 X0)
  Sum m(1,2,4,5)G(X2 X1 X0) Sum m(1,5,7)
• These can be constructed immediately using the
  decoderand or gates.

25
Circuit 9c Simple Decoder

• We note that various functions can be transformed
  from one form to another.

26
Circuit 9c Simple Decoder

• We note that various functions can be transformed
  from one form to another.
• For example H(X2 X1 X0) Sum m(0,3,6,7)

27
Circuit 9c Simple Decoder

• We note that various functions can be transformed
  from one form to another.
• For example H(X2 X1 X0) S m(0,3,6,7) S
  m(0,3,6,7) double complement

28
Circuit 9c Simple Decoder

• We note that various functions can be transformed
  from one form to another.
• For example H(X2 X1 X0) S m(0,3,6,7) S
  m(0,3,6,7) double complement S m(1,2,4,5)
  complement canonical minterm

29
Circuit 9c Simple Decoder

• We note that various functions can be transformed
  from one form to another.
• For example H(X2 X1 X0) S m(0,3,6,7) S
  m(0,3,6,7) double complement S m(1,2,4,5)
  complement canonical minterm F(X2 X1 X0)

30
Circuit 9c Simple Decoder

• We note that various functions can be transformed
  from one form to another.
• For example H(X2 X1 X0) S m(0,3,6,7) G
  m(0,3,6,7) double complement S m(1,2,4,5)
  complement canonical minterm F(X2 X1 X0)

31
Circuit 9c Simple Decoder
Note the inverter on the output H, equivalent to
using a nor gate.

• We note that various functions can be transformed
  from one form to another.
• For example H(X2 X1 X0) S m(0,3,6,7) G
  m(0,3,6,7) double complement S m(1,2,4,5)
  complement canonical minterm F(X2 X1 X0)

32
Circuit 9d Decoders with Enable Input

• Normally, decoders have one or more additional
  input lines referred to as enable inputs.
• These line values determine whether the circuit
  is operational or not.

33
Circuit 9d Decoders with Enable Input

• Normally, decoders have one or more additional
  input lines referred to as enable inputs.
• These line values determine whether the circuit
  is operational or not.
• Example a 2-to-4 decoder with enable
  inputTruth table Outputs DK can only have
  value 1 if enabled, E 1.E x1 x0 D0 D1
  D2 D3 0 - - 0 0 0 0 Note
  x1 x0 dont matter1 0 0 1 0 0 0
  1 0 1 0 1 0 0 1 1 0 0
  0 1 0 1 1 1 0 0 0 1

34
Circuit 9d Decoders with Enable Input

• Normally, decoders have one or more additional
  input lines referred to as enable inputs.
• These line values determine whether the circuit
  is operational or not.
• Example a 2-to-4 decoder with enable
  inputTruth table Outputs DK can only have
  value 1 if enabled, E 1.E x1 x0 D0 D1
  D2 D3 0 - - 0 0 0 0 Note
  x1 x0 dont matter1 0 0 1 0 0 0
  D0 E x1 x0 1 0 1 0 1 0 0
  D1 E x1 x0 1 1 0 0 0 1 0 D2
  E x1 x0 1 1 1 0 0 0 1 D3
  E x1 x0

35
Circuit 9d Decoders with Enable Input

• Example a 2-to-4 decoder with enable inputD0
  E x1 x0 D1 E x1 x0 D2 E x1 x0
  D3 E x1 x0

36
Circuit 9d Decoders with Enable Input

• Example a 2-to-4 decoder with enable inputD0
  E x1 x0 D1 E x1 x0 D2 E x1 x0
  D3 E x1 x0

37
Circuit 9e Decoder as LED Controller

• We now consider using a decoder to control the
  output of a set of light emitting diodes (LEDs)
  that display a decimal digit.

LEDdigit
38
Circuit 9e Decoder as LED Controller

• We now consider using a decoder to control the
  output of a set of light emitting diodes (LEDs)
  that display a decimal digit.
• We use a 4-to-7 decoder with enable input (E
  1 ON, E 0 OFF)

LEDdigit
0
1
2
3
5
4
6
39
Circuit 9e Decoder as LED Controller

• We now consider using a decoder to control the
  output of a set of light emitting diodes (LEDs)
  that display a decimal digit.
• We use a 4-to-7 decoder with enable input (E
  1 ON, E 0 OFF)E x3 x2 x1 x0 z0 z1
  z2 z3 z4 z5 z6 0 - - - - 0 0
  0 0 0 0 0

LEDdigit
40
Circuit 9e Decoder as LED Controller

• We now consider using a decoder to control the
  output of a set of light emitting diodes (LEDs)
  that display a decimal digit.
• We use a 4-to-7 decoder with enable input (E
  1 ON, E 0 OFF)E x3 x2 x1 x0 z0 z1
  z2 z3 z4 z5 z6 0 - - - - 0 0
  0 0 0 0 0 1 0 0 0 0 1 1 1
  0 1 1 1

LEDdigit
41
Circuit 9e Decoder as LED Controller

• We now consider using a decoder to control the
  output of a set of light emitting diodes (LEDs)
  that display a decimal digit.
• We use a 4-to-7 decoder with enable input (E
  1 ON, E 0 OFF)E x3 x2 x1 x0 z0 z1
  z2 z3 z4 z5 z6 0 - - - - 0 0
  0 0 0 0 0 1 0 0 0 0 1 1 1
  0 1 1 1 1 0 0 0 1 0 0 1 0
  0 1 0 1 0 0 1 0 1 0 1 1 1
  0 1 1 0 0 1 1 1 0 1 1 0 1
  1

LEDdigit
42
Circuit 9e Decoder as LED Controller

• We now consider using a decoder to control the
  output of a set of light emitting diodes (LEDs)
  that display a decimal digit.
• We use a 4-to-7 decoder with enable input (E
  1 ON, E 0 OFF)E x3 x2 x1 x0 z0 z1
  z2 z3 z4 z5 z6 0 - - - - 0 0
  0 0 0 0 0 1 0 0 0 0 1 1 1
  0 1 1 1 1 0 0 0 1 0 0 1 0
  0 1 0 1 0 0 1 0 1 0 1 1 1
  0 1 1 0 0 1 1 1 0 1 1 0 1
  1 1 0 1 0 0 0 1 1 1 0 1 0
  1 0 1 0 1 1 1 0 1 0 1 1

LEDdigit
43
Circuit 9e Decoder as LED Controller

• We now consider using a decoder to control the
  output of a set of light emitting diodes (LEDs)
  that display a decimal digit.
• We use a 4-to-7 decoder with enable input (E
  1 ON, E 0 OFF)E x3 x2 x1 x0 z0 z1
  z2 z3 z4 z5 z6 0 - - - - 0 0
  0 0 0 0 0 1 0 0 0 0 1 1 1
  0 1 1 1 1 0 0 0 1 0 0 1 0
  0 1 0 1 0 0 1 0 1 0 1 1 1
  0 1 1 0 0 1 1 1 0 1 1 0 1
  1 1 0 1 0 0 0 1 1 1 0 1 0
  1 0 1 0 1 1 1 0 1 0 1 1 1
  0 1 1 0 0 1 0 1 1 1 1 1 0
  1 1 1 1 0 1 0 0 1 01 1 0 0
  0 1 1 1 1 1 1 1

LEDdigit
44
Circuit 9e Decoder as LED Controller

• We now consider using a decoder to control the
  output of a set of light emitting diodes (LEDs)
  that display a decimal digit.
• We use a 4-to-7 decoder with enable input (E
  1 ON, E 0 OFF)E x3 x2 x1 x0 z0 z1
  z2 z3 z4 z5 z6 0 - - - - 0 0
  0 0 0 0 0 1 0 0 0 0 1 1 1
  0 1 1 1 1 0 0 0 1 0 0 1 0
  0 1 0 1 0 0 1 0 1 0 1 1 1
  0 1 1 0 0 1 1 1 0 1 1 0 1
  1 1 0 1 0 0 0 1 1 1 0 1 0
  1 0 1 0 1 1 1 0 1 0 1 1 1
  0 1 1 0 0 1 0 1 1 1 1 1 0
  1 1 1 1 0 1 0 0 1 01 1 0 0
  0 1 1 1 1 1 1 1 1 1 0 0 1
  1 1 1 1 0 1 0

LEDdigit
45
Circuit 9e Decoder as LED Controller

• We obtain the canonical minterm expressionsE
  x3 x2 x1 x0 z0 z1 z2 z3 z4 z5 z6
  0 - - - - 0 0 0 0 0 0 0 1
  0 0 0 0 1 1 1 0 1 1 1 1 0
  0 0 1 0 0 1 0 0 1 0 1 0 0
  1 0 1 0 1 1 1 0 1 1 0 0 1
  1 1 0 1 1 0 1 1 1 0 1 0 0
  0 1 1 1 0 1 0 1 0 1 0 1 1
  1 0 1 0 1 1 1 0 1 1 0 0 1
  0 1 1 1 1 1 0 1 1 1 1 0 1
  0 0 1 01 1 0 0 0 1 1 1 1
  1 1 1 1 1 0 0 1 1 1 1 1 0
  1 0

46
Circuit 9e Decoder as LED Controller

• We obtain the canonical minterm expressionsE
  x3 x2 x1 x0 z0 z1 z2 z3 z4 z5 z6
  0 - - - - 0 0 0 0 0 0 0 1
  0 0 0 0 1 1 1 0 1 1 1 1 0
  0 0 1 0 0 1 0 0 1 0 1 0 0
  1 0 1 0 1 1 1 0 1 1 0 0 1
  1 1 0 1 1 0 1 1 1 0 1 0 0
  0 1 1 1 0 1 0 1 0 1 0 1 1
  1 0 1 0 1 1 1 0 1 1 0 0 1
  0 1 1 1 1 1 0 1 1 1 1 0 1
  0 0 1 01 1 0 0 0 1 1 1 1
  1 1 1 1 1 0 0 1 1 1 1 1 0
  1 0

47
Circuit 9e Decoder as LED Controller

• And simplify, if possible (e.g. using
  complementation)E x3 x2 x1 x0 z0 z1
  z2 z3 z4 z5 z6 0 - - - - 0 0
  0 0 0 0 0 1 0 0 0 0 1 1 1
  0 1 1 1 1 0 0 0 1 0 0 1 0
  0 1 0 1 0 0 1 0 1 0 1 1 1
  0 1 1 0 0 1 1 1 0 1 1 0 1
  1 1 0 1 0 0 0 1 1 1 0 1 0
  1 0 1 0 1 1 1 0 1 0 1 1 1
  0 1 1 0 0 1 0 1 1 1 1 1 0
  1 1 1 1 0 1 0 0 1 01 1 0 0
  0 1 1 1 1 1 1 1 1 1 0 0 1
  1 1 1 1 0 1 0

48
Circuit 9e Decoder as LED Controller
49
Circuit 10 Encoders
50
Circuit 10 Encoders

• Encoders are essentially the inverse of
  decoders.
• Typical encoders are represented as 2N input
  lines to N output lines.
• In general, encoders are N-to-M decoders, where N
  gt M.

51
Circuit 11 Multiplexers
52
Circuit 11 Multiplexers

• Multiplexers are used in many places within
  computers. One important use is in designing and
  constructing data buses.

53
Circuit 11 Multiplexers

• Multiplexers are used in many places within
  computers. One important use is in designing and
  constructing data buses.
• For this reason they are also called data
  selectors.

54
Circuit 11 Multiplexers

• Multiplexers are used in many places within
  computers. One important use is in designing and
  constructing data buses.
• For this reason they are also called data
  selectors.
• Assuming that data exists in 2N locations, I0,
  I1, etc., the objective of the circuit is to
  obtain a copy of the data value, IK, at the
  output, F.

55
Circuit 11 Multiplexers

• Multiplexers are used in many places within
  computers. One important use is in designing and
  constructing data buses.
• For this reason they are also called data
  selectors.
• Assuming that data exists in 2N locations, I0,
  I1, etc., the objective of the circuit is to
  obtain a copy of the data value, IK, at the
  output, F.
• The data value, IK, is selected using
  theselector inputs, SJ, similar to the
  operationof the decoder.

56
Circuit 11 Multiplexers

• Multiplexers are used in many places within
  computers. One important use is in designing and
  constructing data buses.
• For this reason they are also called data
  selectors.
• Assuming that data exists in 2N locations, I0,
  I1, etc., the objective of the circuit is to
  obtain a copy of the data value, IK, at the
  output, F.
• The data value, IK, is selected using
  theselector inputs, SJ, similar to the
  operationof the decoder.
• The multiplexer, or MUX, may be enabled/disabled.

57
Circuit 11 Multiplexers

• The details of the circuit are easily derived and
  laid out in the form

58
Circuit 11 Multiplexers

• The details of the circuit are easily derived and
  laid out in the form

Disabled MUX
I0I1I2I3
0
0
S1 S0
59
Circuit 11 Multiplexers

• The details of the circuit are easily derived and
  laid out in the form

Enabled MUX
60
Circuit 11 Multiplexers

• Example. Consider a data bus intended to fetch
  4-bits from a specified address.

61
Circuit 11 Multiplexers

• Example. Consider a data bus intended to fetch
  4-bits from a specified address.

Address RAM Contents
62
Circuit 11 Multiplexers

• Example. Consider a data bus intended to fetch
  4-bits from a specified address.

Address RAM Contents
Each memory unit contains 4 bits. Each bit has
an input/output line.Note the important fact
that each memory unit has a separate and unique
address.
63
Circuit 11 Multiplexers

• Example. Consider a data bus intended to fetch
  4-bits from a specified address.

Address RAM Contents
It is required to copy (obtain) the 4-bits of a
specified address to a different output location
that can hold 4-bits.We use multiplexers to
achieve this goal.
64
Circuit 11 Multiplexers

• Example. Consider a data bus intended to fetch
  4-bits from a specified address.

Means enableis ON.
Address RAM Contents
F0 F1 F2 F3
First, connect an Nx1 MUX to each of the N bits
labeled bit-0, or B0. Then, add L more such MUX
connections to form a complete bus.
S1 S0
65
Circuit 11 Multiplexers

• Example. Consider a data bus intended to fetch
  4-bits from a specified address.

Means enableis ON.
Address RAM Contents
F0 F1 F2 F3
The full circuit shows how a data bus
architecture may be defined.
S1 S0
66
Circuit 11 Multiplexers

• Example. Consider a data bus intended to fetch
  4-bits from a specified address.

Means enableis ON.
Address RAM Contents
F0 B0 F1 B1 F2 B2 F3 B3
The highlighted lines show how data selection is
achieved.
Address selection
0 1
67
Circuit 11 Multiplexers

• There are numerous applications of multiplexers
  in logic design.
• Review the examples discussed in the textbook
• Section 5.6.1 pages 266-276.

68
Summary - Part II

• We continue to study logic design in the contexts
  of Small Scale Integration (SSI) and Medium Scale
  Integration (MSI) of gate devices.
• We have studied the design of a number of
  specific, practical functional circuits with a
  view to re-using those circuits as components in
  MSI design. Adders
  Subtractors Comparator
• We note the differing design approaches, or
  emphases, effected by differential layering of
  abstraction. (The same design issue arises in
  the context of software engineering as well.)
  SSI Boolean algebra / Simplification /
  Logic gates MSI Interconnection
  networks / Iterative re-use / Components