IKI10201: Introduction to Digital Systems

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IKI10201 Introduction to Digital Systems

• Bobby Nazief
• Semester-I 2005 - 2006

The materials on these slides are adopted from
those in CS231s Lecture Notes at UIUC, which is
derived from Howard Huangs work and developed by
Jeff Carlyle.
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Course Objectives

• To learn how to design digital circuits
• Boolean algebra
• Logic gates digital circuits
• Circuit optimization
• To understand how different digital systems work
• Combinatorial circuits
• Sequential circuits
• Digital components of a computer
• Todays
• Design process
• Data types representations

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Analog systems

• Systems where the information has continuous
  values.

V
t
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Digital systems

• Systems where the information has discrete
  values
• 0 and 1
• Low and High
• False and True
• Open and Close
• ...

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Designing digital systems

• Define what the system will do? specification
• Determine the components of which the system will
  be built of, and define the interconnection
  between components to meet the specification?
  design
• Construct the system? product

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Design Representations

• Behavioral or functional representation
• specifies the behavior or the function of a
  design without any implementation information
• Structural representation
• specifies the implementation of a design in terms
  of components and their interactions
• Physical representation
• specifies the physical characteristics of the
  design and can be thought of as a blueprint for
  manufacturing

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Example of behavioural rep. Alarm clock
seconds modulo 60,minutes modulo 60,hours
modulo 12
clock process
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Example of behavioural rep. Alarm clock
alarm process
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Example of structural rep. Alarm clock
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Example of physical rep. Alarm clock
front view
pcb (printed-circuit board)
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Levels of abstraction
IKI10201
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Design Process

• Design Specificationdefines products
  specification/functionality/behavior
• 2. Library Developmentdefines products
  components
• 3. Design Synthesisconvert specification to
  structural description
• 4. Design Analysisverify that the design
  structure meets specification
• 5. Documentationprepare documentation for
  manufacturing
• 6. Manufacturing

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CAD Tools

• 1. Capture and Modellingschematic capture,
  modelling in hardware description language (HDL)
• 2. Synthesislogic synthesis, sequential
  synthesis, behavioral/high-level synthesis
• 3. Verification and Simulation
• 4. Physical Designoptimize the placement of
  components the routing of wires
• 5. Test Generation

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Summary

• Design representations
• behavioral, structural, physical
• Levels of abstraction
• transistor, gate, register, processor
• Design process
• specification, library, synthesis, analysis,
  documentation

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The Team

• Lecturer
• Bobby Nazief (nazief_at_cs.ui.ac.id)
• Office Gedung C, room 3211
• Office hours Wed from after class to 10am
  11am, or later (depending on whether I have
  meetings or not ?)
• Lab. Coordinator
• Petrus Mursanto (santo_at_cs.ui.ac.id)
• Office Gedung A, room 1224
• Assistants
• ...
• ...

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Resources Evaluation

• Books
• Daniel D.Gajski, Principle of Digital Design,
  Prentice Hall, 1997.
• Any introductory book to Digital Logic will do.
• Tools
• MULTISIM digital system design tool
• Web Site
• http//www.cs.ui.ac.id/kuliah/IDS-PISIK (to be
  confirmed later)
• Evaluation
• HW/Lab. Assignments 20
• Mid-term Exam 30
• Final Project 20
• Final Exam 30

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Road Map
Logic Gates Flip-flops
3
Boolean Algebra
3
6
Finite-StateMachines
6
4
Sequential DesignTechniques
Logic DesignTechniques
CombinatorialComponents
StorageComponents
2
Binary Systems Data Represent.
7
5
8
Register-TransferDesign
8
Generalized FSM
ProcessorComponents
9
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Agenda

• Week Date Topic
• 1 31-Aug 1. Introduction
• 2 07-Sep 2. Data Types Representations
• 3 14-Sep 3a. Boolean Algebra, Canonical
  Standard Forms
• 4 21-Sep 3b. Logic Gates Implementations
• 5 28-Sep 4a. K-Map, Map Method
• 6 05-Oct 4b. Tabulation Methods, Gate Array
• 7 12-Oct 5a. Adders, Subtractors, Multipliers
• 8 19-Oct 5b. Logic Unit, ALU, Decoders,
  Selectors, Encoders, etc.
• 9 26-Oct Mid-Term Exam
• 02-Nov Lebaran Holiday
• 10 09-Nov 6a. Latches, Flip-flops
• 11 16-Nov 6b. Analysis of Sequential Logic
• 12 23-Nov 6c. Synthesis of Sequential Logic
• 13 30-Nov 7. Storage Components
• 14 07-Dec 8. Register-Transfer Design 9.
  Processor Design
• Final Exam