IP Delivery for FPGAs Using Applets and JHDL

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IP Delivery for FPGAs Using Applets and JHDL

• Michael J. Wirthlin
• Brian McMurtrey
• http//www.jhdl.org/applets

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Outline

• Introduction Related Work
• Overview (Applets, IP Delivery Approach)
• JHDL
• JHDL Module Generators
• Constant Coefficient Multiplier Example
• IP Delivery Applets
• Examples
• Conclusions

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Introduction

• Density of modern FPGAs growing rapidly
• Third-party IP necessary for large FPGA designs
• Reduce design time
• Improve overall design quality
• Increase design productivity
• Challenges of IP delivery evaluation
• Provide sufficient visibility to satisfy user
• Protect unauthorized use or reproduction of IP
• Goal Deliver FPGA IP on Web through Java applets
• Control visibility of IP through custom
  executables
• Maintain executables on-line as Java applets

4
Related Work
Web-CAD
Fin,Fummi 2000

• Provides simulation of IP over internet
  (client/server)
• IP protected by remote IP server

JavaCAD
Dalpasso, et. 1999

• Simulates IP using Remote Method Invocation (RMI)
• Provides area, power, and delay estimates of IP

JBits
James-Roxby, Guccione 2000

• Delivers pre-placed IP cores by modifying
  bitstream
• IP protected within Java executable

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Java Applets

• Executable programs written in Java that can be
  embedded within a Web Page

• Convenient delivery approach for on-line
  applications
• Platform independent
• Requires no software installation
• Applet executable maintained at server
• Applets can be used to deliver electronic IP .
  . .

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IP Delivery Using Applets

• Circuit IP encapsulated by Java Applet
• Circuits described by JHDL (Java based HDL)
• IP evaluation tools included (estimator,
  simulator, viewer, etc.)

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JHDL
Hutchings, Nelson 2000

• Open source design environment developed at BYU
• Circuits described structurally by Java class
  files
• Interface defined by static initializer
• Circuit objects and wires instanced within
  constructor
• Libraries available for a number of FPGA families
• Several design aids available
• Circuit simulator
• Circuit schematic viewer
• Netlist generator
• See www.jhdl.org for more information JHDL

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JHDL Design Example
public FullAdder(Node parent, Wire a, Wire b,
Wire cin, Wire sum, Wire cout)
super(parent) connect("a", a) /
connect wires to ports / connect("b", b)
connect("cin", cin) connect("sum", sum)
connect("cout", cout) Wire t1 wire(1)
/ allocate signals / Wire t2
wire(1) Wire t3 wire(1) new
and2(this,a,b,t1) new and2(this,a,cin,t2)
new and2(this,b,cin,t3) new
or3(this,t1,t2,t3,sum) / co is carry out /
new xor3(this,a,b,cin,cout) / s is output
/
Note some necessary details have been removed
for brevity
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JHDL Design Example (cont.)
bash javac FullAdder.java bash java jab
FullAddder
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Module Generation Using JHDL

• Access to powerful Java programming constructs
• Availability of Java data structures
• Exploit reusability through inheritance
• Native support for documentation generation
• Support for relational placement
• Libraries for circuit mapping, movement, rotation
• Layout viewer
• Built-in module generator design aids
• Circuit simulator
• Structural viewer
• Java testbenches
• APIs for application-specific viewers

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Module Generation Using JHDL

• Arithmetic
• Multipliers (many!)
• Number conversion
• Dividers
• Signal Processing
• CORDIC (several)
• FIR Filters
• CIC
• Adaptive Filters
• Floating Point
• Add/Subtract
• Multiply/Divide

• Counters
• Comparitors
• Digit-Serial Arithmetic
• Finite State Machine
• Delay Line
• LFSR
• Memory

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Constant Coefficient Multiplier
Wirthlin, McMurtrey 2001

• Efficient constant multiplier using look-up
  tables
• Partial products stored in FPGA LUTs
• Partial products summed using high-speed adders
• Exploits advanced features of Xilinx Virtex FPGA
• Complex JHDL module generator
• Computes contents of each 1-bit LUT
• Determines most efficient use of FPGA resources
• Adds appropriate layout annotations

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Instancing Constant Multiplier

• Module created by constructing circuit in Java

public VirtexKCMMultiplier(Node parent, Wire
multiplicand, Wire product, boolean
signed_mode, boolean pipelined_mode, int
constant)
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Module Generator Executable

• Eliminate need of instancing modules with JHDL
• User Interface to simplify generation of modules
• Obtain parameters from user
• Instance module within JHDL
• Provides feedback from module
• (size, speed, layout, view, etc.)
• Example Constant Multiplier GUI

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Module Generator Applets

• Module Generator GUI can be put on Web via
  Applets
• IP GUI and JHDL written in Java
• Compiled .class/.jar files placed on web server
• ltappletgt tag inserted into .html Web page
• Executing IP Applet
• User accesses appropriate Web page
• Web page and applet binaries transferred over web
• Applet executes within browser
• Advantages
• IP is exposed to more people via the internet
• User does not need to install software to
  evaluate module
• Module IP can be maintained at centralized web
  server

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Customizing IP Applets

• Applet customized to needs of consumer/vendor
• Inclusion of design visibility/delivery tools
  controlled by Applet creator

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Customized IP Applets

• Transparent IP Delivery Applet
• IP Module Generator
• Structure Layout Viewer
• Circuit Simulator
• Netlist Generation

• Opaque IP Evaluation Applet
• IP Module Generator
• Estimate size/speed of IP
• No visibility or delivery

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Stand-Alone Applet

• IP not simulated with other system components
• Applet provides estimators
• IP functional simulator
• IP structural viewer

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Black-Box Simulation Applet

• IP simulated with other system components
• Simulator events transferred via sockets
• Limitations due to Applet security model

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Applet Download Time

• Access of IP Applets may be limited by available
  network bandwidth
• Size of applet .jar files reduce to improve
  applet access time

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Applet Example
http//www.jhdl.org/applets
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Applet Example
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Applet Example
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Applet Example
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Applet Example
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Conclusions

• Provide IP exposure to wide audience via the
  internet
• No additional software required
• IP maintained at centralized server
• Facilitate IP evaluation by provide on-line JHDL
  tools
• Circuit estimators
• Circuit viewers
• Simulator and Simulator API
• IP delivery via netlist generation
• Control visibility of applet by customizing
  executable
• Visit http//www.jhdl.org/applets for more demos