CoE EE 00142 Computer Organization Set 5 Fetch Execute

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CoE - EE 00142Computer OrganizationSet 5 -
Fetch Execute

• Ron Hoelzeman

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Basic Computer Organization
3
Computer Addressing Techniques

• Computer memory - variety of forms
• RAM, ROM, Cache, Disk, Tape, etc.
• Focus on RAM - operating memory
• Basic concepts
• Address and Contents

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Example Memory
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Fetch Execute Cycle

• Fetch - get the next instruction from memory
• Decode - figure out what to do with it
• Execute - do it
• This is how all computers work

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Memory Organization

• Address space - how much
• Determines address width
• Byte (8 bits)
• Word (typically 16 or 32 bits)
• Symbols - MA or M(A) denotes contents of memory
  at address A
• example ACC MA implies put the contents
  of memory at location A onto the accumulator

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Typical Registers

• ACC Accumulator
• IR Instruction Register
• PSR - Status Register
• A, B, etc. data registers
• PC - Program Counter
• SP - Stack Pointer

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Simplified Control Unit
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Example Program
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Example System
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Example of Fetch Execute Cycle
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Instruction Types

• Three Address Instructions
• ADD T1,A,B
• Two Address Instructions
• ADD T1,A
• One Address Instructions
• ADD B
• Zero Address Instructions
• SHR

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Typical Instruction Formatfor Register Operations
Assumes 8 registers - R0 - R7
Figure 8-16 Page 388
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Example Register Operations
Example let DR 111 R7 let SA
001 R1 let SB 010 R2 Then the operation is
R1 R2 --gt R7
Figure 8-16 Page 388
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Example Register Operations
Example let DR 111 R7 let SA
001 R1 let OP 011 3 Then the operation is
R1 3 --gt R7
Figure 8-16 Page 388
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Mips Functional Units
Figure 5.1
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Typical Storage Resources
Figure 8-18 Page 390
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Stored Program Concept
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MIPS Memory Addresses
Figure 3.2 - 3.3
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Endianess

• Big Endian address of msb word address (xx00
  Big End of word)
• IBM 360/370, Motorola 68k, MIPS, Sparc, HP PA
• Little Endian address of lsb word
  address(xx00 Little End of word)
• Intel 80x86, DEC Vax, DEC Alpha (Windows NT)

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Components of the Instruction Cycle
Figure 5.4
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Fetching Instructions
Figure 5.5
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Register File and ALU
Figure 5.6
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R-type Instructions Datapath
Figure 5.7
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MIPS Fetch Sequence
Figure 5.36
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Typical Memory Instruction Format
Example let mode direct let address
2356 Then the operation is add the contents of
location 2356 to the acc and put the result on
the acc
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Typical Addressing Modes

• Implied Mode
• Immediate Mode
• Register Mode
• Direct Mode
• Indirect Mode
• Relative Mode
• Indexed Mode

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Example for Addressing Modes
Mano Figure 11-4
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Addressing Modes
Direct
Mano Table 11-1
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Direct Addressing Mode
ACC 800
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Addressing Modes
Immediate
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Immediate Addressing Mode
ACC 500
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Addressing Modes
Indirect
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Indirect Addressing Mode
ACC 300
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Addressing Modes
Relative
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Relative Addressing Mode
500 252 752
Note PC 252
ACC 600
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Addressing Modes
Index
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Indexed Addressing Mode
500 400 900
ACC 200
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Addressing Modes
Register
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Register Addressing Mode
ACC 400
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Addressing Modes
Register Indirect
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Register Indirect Addressing
ACC 700
Note Subset of Indexed
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Addressing Modes
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MIPS Addressing Formats

• Immediate Mode
• Register Mode
• Indirect Mode
• Indexed Mode
• Relative Mode

Figure 3.17
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Basic Symbols for Register Transfers
Graphics from Logic and Computer Design
Fundamentals, Mano Kime, Prentice Hall
46
Typical Data Instructions
Graphics from Logic and Computer Design
Fundamentals, Mano Kime, Prentice Hall
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Typical Data Instructions

• Load LD
• load register from memory
• Store ST
• store register into memory
• Move MOVE
• move from one register to another

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MIPS Data Loads and Stores
Figure 5.8
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MIPS Datapath for Load-Store
Figure 5.9
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MIPS Load Instruction
Consider load lw t1, offset (t2)
Figure 5.25
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MIPS Datapath for Branch
Figure 5.10
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MIPS Addressing Formats
Figure 3.17
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MIPS Combined Datapath
Figure 5.11
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MIPS Datapath with Fetch
Figure 5.12
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MIPS Datapath with Muxs
Figure 5.17
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MIPS Datapath with Control
Figure 5.19
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MIPS Simple Control and Datapath
Figure 5.29
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MIPS Multicycle Datapath
Shared memory Shared ALU
Figure 5.30
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MIPS Complete Multicycle
Figure 5.33
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Finite State Machine Controller
Figure 5.43
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Microcode Controller
Figure 5.47
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Additional Example Data Instructions

• Exchange XCH
• move from one register to another or to/from
  memory (similar to MOVE)
• Push PUSH
• put data onto stack
• Pop POP
• pull data from stack

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Additional Data Instructions

• Input IN
• input data from outside into accumulator
• Output OUT
• output data from accumulator to outside world

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Typical Arithmetic Instructions
Graphics from Logic and Computer Design
Fundamentals, Mano Kime, Prentice Hall
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Typical Arithmetic Instructions

• Increment INC
• add 1 to register or accumulator
• Decrement DEC
• subtract one from register or accumulator
• Add ADD
• add the contents of a memory location to a
  register or the accumulator
• Subtract SUB
• similar to add

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Typical Arithmetic Instructions

• Multiply MUL
• typically multiply contents of a register or
  memory location times the accumulator and leave
  the result on accumulator
• Divide DIV
• typically divide contents of the accumulator by a
  register or memory location and leave the result
  on accumulator

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Typical Arithmetic Instructions
Graphics from Logic and Computer Design
Fundamentals, Mano Kime, Prentice Hall
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Typical Logic Bit Manipulation Instructions
Graphics from Logic and Computer Design
Fundamentals, Mano Kime, Prentice Hall
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Typical Shift Instructions
All associated with accumulator or register
Graphics from Logic and Computer Design
Fundamentals, Mano Kime, Prentice Hall
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Typical Program Control Instructions
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Typical Branch Instructions
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Typical Branch Instructions
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Typical Branch Instructions
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Jump or Branch Type Instructions

• May be conditional or not
• May be Direct, Relative, etc.
• Change Program Counter - PC
• Example
• JMP 805 causes PC lt-- 805

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Simplified Instruction Word Format
Word has 16 bits (2 Bytes) 4 bits for Opcode
(1610 combinations) 12 bits for operand or
address (409610 combinations)
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Example Instruction Word Format
Word has 16 bits (2 Bytes) 4 bits for Opcode 12
bits for operand or address
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Example Program
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ExampleAssembled Program
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(No Transcript)
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Stack Instructions

• Stack is portion of regular memory
• Stack pointer is register which points to that
  memory
• PUSH - puts data onto the stack from register or
  memory
• POP - removes data from the stack

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Stack Instructions
POP
SP --gt 102
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Stack Instructions
PUSH
SP --gt 100
Graphics from Logic and Computer Design
Fundamentals, Mano Kime, Prentice Hall
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Subroutines or Call Return

• Typically used for a specific program task
• Typically called from several places in the
  program
• Requires control to return to main program at
  point of departure

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Subroutines Typically Use Stack

• Call subroutine
• SP lt-- SP - 1
• MSP lt-- PC
• PC lt-- Effective address
• Return from subroutine
• PC lt-- MSP
• SP lt-- SP 1

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Call Instruction
501
500 CALL 250 SP lt-- 100 M100 lt-- 501 PC lt--
250
250
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Return Instruction
501
260 RETURN PC lt-- M100 SP lt-- SP 1
261
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Subroutine Call Example
LABEL OPCODE OPERAND COMMENT EXAMPLE NAM progr
am name SIZE EQU 04 array size
param ORG C100 MAIN PSHB save
state LDAA SIZE array size PSHA push size
param LDX R array addr PSHX push addr
param JSR ASUM jump to arraysum PULX clear
stack address PULB clear stack
size PULB restore state ABA calc.
Z STAA Z store result ASUM TSX X
SP - 1 LDAB 4,X BMX4 size LDX 2,X XMX
2MX3 CLRA LOOP ADDA X AAMX INX ne
xt array element DECB loop counter BGT LOOP
RTS Z FCB 0 initialize answer R FCB 1,2,3,4
initialize array END
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MIPS Stack Example
Figure 3.10
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Interrupts
Graphics from Logic and Computer Design
Fundamentals, Mano Kime, Prentice Hall
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6811 Stack Notes

• Stack grows toward low memory
• SP always points to next free byte past top of
  stack
• User stack should be initialized to DF00
• Requires stack discipline

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End of Set 5