Electronic Warfare Digital Radar Receiver

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Electronic Warfare Digital Radar Receiver
By Peter Petrany Michael Gahl
Advisors Dr. Huggins, Dr. Ahn Mr. Jim
Jensen
Bradley University Peoria, IL Department of
Electrical and Computer Engineering
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Outline

• Background/Theory
• Project Statement
• Top level Block Diagram
• RF Front end (with PLL)
• FFT to find RF signal characteristics
• Simulink Simulation
• Division of Labor (schedule)

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Background

• What is an EWDigRec?
• Receives unknown RF signal
• Determines characteristics

• What are the Applications?
• National Defense
• Jamming
• Spoofing

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Project Statement
Develop RF front end to receive RF signal and
sample with DAQ
From FFT of sampled data, generate RF
characteristics
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Top Level Block Diagram
00 01
10 11
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Characteristics
fRF

• RF frequency (fRF)
• Pulse Width (PW)
• Pulse Repetition Rate (PRR)

PW
1/PRR
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Sub Level Block Diagram
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Sub Level Block Diagram
IF

• LNA- receives RF signal

• PLL- produces LO frequency

• Mixer- downconverts RF signal

• IF- sampled by DAQ

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Locating FFT
1MHz
5MHz
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Sub Level Block Diagram
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Sub Level Block Diagram

• DAQ- samples IF signal

• DSP- performs FFT and extracts RF
  characteristics

• Monitor- displays RF characteristics and
  signal detection

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Finding RF Characteristics via FFT
(1)
(3)
w(t)
s(t)w(t) p(t)
p(t)
(2)
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Finding RF Characteristics via FFT
Time Domain
Frequency Domain
Time Domain
Frequency Domain
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Finding RF Characteristics via FFT
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Finding RF Characteristics via FFT
CHARACTERISTICS 1 2 3
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Finding RF Characteristics via FFT
CHARACTERISTICS 1 2 3
PRR

0
1
PW
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RF signal
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PW 0.1 s
fRF33.3 Hz
Simulink
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PRR 0.5 s
fRF 33.33 Hz
PW 0.1 s
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Flowchart
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Flowchart
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Fast Fourier Transform (FFT)
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PRR 0.5 s
1/PW 0.1 s
fIF 33.33 Hz
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Schedule of Labor
Schedule Schedule Schedule
Week Task Project Member
Winter Break Research order parts DAQ, LNA, Mixer, PLL components Research PLL Both Michael
Week 1 Jan 24 28 Learn to operate the signal generator (sig. gen.) spectrum analyzer Both
Week 2 3 Jan 31 Feb 11 Learn operation of DAQ board begin testing w/ computer sig. gen. Begin building testing RF front end w/ sig. gen. (excluding PLL) Peter Michael
Week 4 5 Feb 14 25 Continue writing modifying MATLAB simulation w/ noise Build test PLL Peter Michael
Week 6 8 Feb 28 Mar 11 Mar 21 - 25 Research implement DSP techniques into MATLAB simulation Continue building testing PLL, integrate into RF front end Peter Michael
Week 9 10 Mar 28 Apr 8 Implement Processing Control Commands into MATLAB code Implement tunable portion of PLL (programmable divider) Peter Michael
Week 11 Apr 11 15 Integrate RF front end w/ software side Both
Week 12 13 Apr 18 29 Prepare for final report, student Expo, presentation Both
Week 14 May 3 Presentation Both

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Questions
Electronic Warfare Digital Radar Receiver
By Peter Petrany Michael Gahl
Bradley University Peoria, IL Department of
Electrical and Computer Engineering