EECE 259 Introduction to Microcomputers

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EECE 259Introduction to Microcomputers

• Midterm Review
• Feb. 14, 2007
• Usman Ahmed

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Outline

• Announcements
• Exam-writing Strategy
• Value of Time
• Budget Your Time
• Midterm Expectations
• Lecture Summary

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Announcements

• Midterm Details
• 20 or 25 of your FINAL grade
• Whichever gives you a higher grade
• THURSDAY, Feb 15
• 600pm to 730pm
• NO EXTRA TIME if YOU are LATE!
• Midterm Location
• Registered in Section 201 DMP 310
• Registered in Section 202 DMP 110
• Exception if writing CPSC 260 midterm, go to
  DMP310

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General Exam-writing Strategy

• Maximum Marks for Minimum Effort
• Review ALL questions on test
• Which is worth most marks ?
• Which is easiest FOR YOU ?
• Which gives most marks for partial solution ?
• Plan of Attack
• Answer EASIEST (most marks) questions first !!!

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Value of Time

• Time is valuable
• EECE 259 tests often long, time-limited
• Get faster, save time, get higher marks!
• Practice, practice, practice!
• Solve all homework questions
• Look for problems from PAST YEARS of 259
• Not exact same material / order of material, but
  similar
• Online, textbooks for even more problems

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Value of Time

• Dont ask questions
• Ask only if ERROR SUSPECTED in question
• Instructor doesnt help or give hints
• Usually questions are a WASTE OF TIME
• Making assumptions
• While studying, ASK before assuming
• Better yet ? TRY IT on your DE1 board (if
  possible)
• While writing test, WRITE assumptions down
• You may get partial credit, or no credit

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Budget Your Time

• Develop a Time Budget
• Maximum minutes per question
• Based on mark value
• MAYBE adjust based on difficulty (only if 99
  sure!)
• Reserve slack time at end, at least 10 of total
  time
• Use for checking solutions
• NEVER exceed your time budget for each question
• Question finished early?
• Add to slack at end, NOT to the next question

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Budget Your Time

• Example
• 4 equal-weight questions, 60 minutes
• WRONG Budget 15m each ? no slack time!
• CORRECT Budget 13m each ? 8m slack time
• Question 1 takes only 7m
• Slack time grows 8m6m 14m
• Question 2 still gets only 13m
• If not enough, REVISIT at END of test

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Midterm Expectations

• Covers ALL Course Material
• All lectures
• Homework 1 and 2
• Study Questions and Practical Assignments
• Midterm Supplemental Study Questions (online)
• Aids
• No calculators, DE1 boards, books, notes, aid
  sheets
• If you need it, we will supply it
• Marks Breakdown
• 50 Study Questions style
• 50 Practical Assignment style but no DE1 board

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Midterm Expectations

• Memorization generally wont help
• We will ask you
• To analyze something, or
• To design / synthesize something new
• Memorization doesnt help in these cases!!

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Midterm Expecations

• Know BINARY and HEX numbers
• Memorize it! Practice conversions!
• Ok, this is the only place memorization helps!
• Build datapath blocks out of logic gates
• ALUs (adders, muxes, etc)
• Register Files
• Sign-extend/zero-extend
• Optimize / reduce logic gates

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Midterm Expecations

• Analyze datapaths
• Like those in PA1 and PA2, or new ones
• Write RTN to do complex calculations
• Eg, computing 4!, or 1234
• Identify complex RTN, break down in to m-ops
• Determine proper sequence of steps
• Determine proper control signal values

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Midterm Expectations

• Synthesize datapaths
• Make changes to existing datapath for new type of
  calculations, eg
• Adding addi instruction to PA2 datapath
• Adding Data Memory for ldw / stw instructions
• Modifying Data Memory for memory-mapped I/O
• Combining Instruction Data Memory (Princeton
  Architecture)

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Midterm Expecations

• Analyze and write NIOS-II programs
• Involving calculations
• Arithmetic
• Logic
• Only simple loops
• Eg, do this a fixed of times
• Maximum of 1 branch instruction in a program
• If asked to repeat something, use a proper LOOP
• DO NOT JUST REPEAT THE INSTRUCTIONS 20 TIMES!!!
• No complex conditionals
• No if/else checking

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Lecture Summary

• LECTURES
• Introduction Analog Real World, Logic Gates
• DFFE, Binary Numbers
• Signed/Unsigned Carry/Overflows
• ALU Structure, Carry/Overflow logic
• Registers, Accumulator, Register File, Datapath-1
• RTN Calculations on Datapath-1
• Different Datapaths, Basic NIOS-II Instructions
• Memory Byte-Addressing, Byte Order
  (Endian-ness), Memory-mapped I/O, Analog
  interfacing
• Datapath-2 Instruction Decoding
• Immediate-mode Arithmetic, Program Counter
• Datapath-2 Instruction Encoding
• Shifts and Rotates
• Branches, Conditional Branches, Comparisons

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Lecture 1 Introduction

• Introduction to Microcomputers
• Real World is analog
• Infinite range/domain of values
• Computer is digital
• Discretized domain (eg, time) and range (eg,
  audio level) form approximations to analog with
  error
• Microcomputer CPU memory I/O
• I/O converts A/D or D/A to connect with Real
  World
• Memory remembers things (state)
• CPU does calculations

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Lecture 1

• Basic logic gates and truth tables
• NOT
• AND
• OR
• 3-input XOR
• XOR, construct out of NOT/AND/OR
• MUX similar to XOR in construction
• NAND universal gate, builds anything

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Lecture 1

• Logic Rules (heavy penalty on midterm)
• Never connect 2 logic outputs together
• Every logic gate input must be connected to
• A constant 0 or 1 (GND or Vdd), OR
• The output of just 1 other gate, OR
• A primary input from Real World, eg, a
  switch.
• Never form a loop with logic gates
• Loop a connection from an output back to 1 or
  more inputs which can reach the same output
• Never use a MUX backwards
• You want a DECODER, not a MUX. Know the
  difference!

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Lecture 2 More Logic

• Sequential Logic
• DFF
• DFFE DFF with Enable input
• Uses DFF and a MUX with a loop
• Loops are OK if they are broken by a flip-flop
• Level-sensitive Latch
• Value flows through and changes while Enable1
• Captures last value as Enable falls to 0

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Lecture 2

• Binary Numbers
• Memorize Powers of 2
• 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024,
  2048, 4096, 8192, 16384, 32768, 65536
• 210 1024
• 216 65536
• Memorize HEX values
• A10, B11, C12, D13, E14, F15
• A1010, B1011, C1100,D1101, E1110,
  F1111

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Lecture 2

• Converting binary to decimal
• Add the powers of 2, eg 1101 84113
• Converting decimal to binary
• Algorithm (generates in order of LSB to MSB)
• Odd/even check (odd ? next bit is 1)
• Divide by 2
• Repeat until reach 0

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Lecture 3 Signed Numbers

• Binary Arithmetic
• UNSIGNED /- may generate Carry/Borrow
• SIGNED /- may generate oVerflow Vadd/Vsub
• Carry/Borrow boundary line
• crosses boundary 1111 to 0000
• Overflow boundary line ? different than C/B
  line !!!
• crosses boundary 0111 to 1000(MSB goes from
  to or vice-versa)
• Logic to compute C/B/Vadd/Vsub is different
• CPU computes all four, doesnt care if SIGNED or
  UNSIGNED
• Programmer chooses which one to use

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Lecture 3

• Twos Complement SIGNED
• To compute B, invert all bits and add 1
• MSB sign bit N, 1negative, 0positive
• Need more bits?
• Sign-extend copy MSB to increase of bits
• Used for /- two numbers with different bits
• Logic for SIGNED /- identical to UNSIGNED
• Use exact same adder/subtractor logic gates

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Lecture 4 Adders and ALUs

• Know how to reason about correctness of logic
  equations in C/B/Vadd/Vsub
• Adders
• N-bit Adder
• String of N full adders (FA)
• Initial carry-in 0
• Full adder two half adders (HA), OR gate
• Adds three 1-bit numbers, produces 2-bit answer
• Half adder AND gate, XOR gate
• Adds two 1-bit numbers, produces 2-bit answer

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Lecture 4

• ALU operates on integers
• Add, Subtract
• Bitwise AND, OR, XOR, (NOR, )
• Shift, Rotate
• Multiply
• Absolute value
• Easy way to build ALU
• Place all above functions in parallel
• Select answer with MUX controlled by ALUop
• Result flags C, B, Vadd, Vsub, N (negative), Z
  (zero)

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Lecture 5 Datapath Blocks

• CPU Datapath Building Blocks
• Register group of N flip-flops (DFF)
• Often DFFE (enable input)
• Often RESET input (clears bits to 0) or PRESET
  input (sets bits to 1)
• Accumulator Adder Register
• Register File
• Registers
• MUX for data read-out
• Decoder and AND gates for write-select control

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Lecture 6 Datapath-1

• Computing on Datapath-1 (PA1)
• RTN Register Transfer Notation
• Eg R0 ? 1 R3
• Purpose determine D values of registers to be
  captured on next rising-edge of CLOCK
• RTN statement implies flow of data, often with
  some type of calculation or operation on data
• Shows flow of data from Q outputs of registers,
  or from constants, to D inputs of registers

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Lecture 6

• RTN on Datapath-1
• Simple datapaths perform simple RTN directly
• Complex RTN cannot be performed directly
• Break down into simple RTN steps or m-ops
• Rules
• Data flows Q ? D
• Each wire/bus/signal takes on only 1 value in
  m-op
• Each m-op takes 1 clock cycle
• Practice RTN calculations in PA1

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Lecture 7 Other Datapaths

• Other Datapaths
• 0-operand stack-based, eg JVM
• 5 4 3 - (answer 6)
• 1-operand accumulator-based, eg 6811
• AddA 4 (adds 4 to accumulator A, answer
  in A)
• 2-operand (no name), eg Intel x86, M68000
• ADD BX, DX (Intel, adds DX to BX, answer in
  BX)
• ADD D1, D3 (Motorola, adds D1 to D3, answer
  in D3)
• 3-operand (no name), eg NIOS-II, other RISC
• ADD R1, R2, R3 (adds R2 and R3, answer in R1)

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Lecture 7

• NIOS-II Instructions
• add rC, rA, rB
• sub rC, rA, rB
• mul rC, rA, rB (both unsigned signed)
• div rC, rA, rB (signed rC rA/rB)
• divu rC, rA, rB (unsigned rC rA/rB)
• and rC, rA, rB
• or rC, rA, rB
• nor rC, rA, rB
• xor rC, rA, rB
• nop ? add r0, r0, r0 (does nothing)

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Lecture 7

• Dual-Port Register File
• Independently reads to registers A, B
• Writes to third register C
• R0 (register 0) is always 0, no matter what!

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Lecture 8 Memory

• Memory Organization
• Each byte has unique address
• Address ? numbered street address of house
• Value ? contents of house (can change)
• Organized as words
• 4 bytes per word
• Read/write access by word
• Address is multiple of 4
• Big-Endian byte order

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Lecture 8

• Memory-mapped I/O
• Special address used for I/O
• Can be inside memory block, or external to memory
• Write saves value in DFF, goes to outside world
• Read gets value from outside world (switches)
• Analog I/O
• Outputs LED resistor
• Inputs Switch resistor

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Lecture 9 Datapath-2 Instructions

• Datapath-2 (PA2)
• Instruction decoding
• Each bit has meaning (wrReg, rA, selMem, )
• Blocks/changes in Datapath-2
• ALU (more operations added)
• Sign-extend (s)
• Effective Address (EA) base register offset
• Data Memory readload word, writestore word

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Lecture 9

• Instruction Encoding/Decoding
• Arithmetic
• add r1, r3, r4
• Immediate
• ldw rC, Imm(rA) read mem at rAs(Imm), put in rC
• stw rB, Imm(rA) write rB into mem at rAs(Imm)
• Also use ldw/stw for I/O (using special address)

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Lecture 10 Instruction Sequences

• Immediate-mode instructions
• addi rC, rA, Imm
• Also subi, muli
• Here, Imm is signed, sign-extended
• andi rC, rA, Imm
• Also ori, xori
• Here, Imm is unsigned, zero-extended

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Lecture 10

• Basic Sequences of Instructions
• Sequence of arithmetic instructions
• Store each instruction in memory
• Each instruction has an address
• Examples
• Calculate (-3)82-14
• Calculate 4!
• Program Counter (PC)
• Counts instruction addresses in-order
• Executes instructions in-order
• Changes to datapath
• PC, s box sign/zero extending

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Lecture 11 Instruction Encoding

• Datapath-2
• Be able to do 2 things
• Given HEX instruction
• Decode into binary control-signal bit fields
• Produce human-readable instructions
• Given human-readable instruction
• Produce binary control-signal bit fields
• Calculate HEX instructions

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Lecture 12

• Unsigned Shifts (move bits left or right, fills
  with 0s)
• Shift right logical srl rC, rA, rB
• Shift left logical sll rC, rA, rB
• Imm versions srli rC, rA, Imm slli
  rC, rA, Imm
• Signed Shifts (fills with sign bit)
• Sh.right arithmetic sra rC, rA, rB
• Imm version srai rC, rA, Imm
• No shift left arithmetic?
• Rotate (shift with wrap-around)
• ror rC, rA, rB
• rol rC, rA, rB
• roli rC, rA, Imm

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Lecture 13

• Branch and Jumps
• br LABEL always goto LABEL
• jmp rA always goto
  instruction at address in rA
• Conditional branches
• beq rA, rB, LABEL if (rA rB) goto
  LABEL, else goto PC4
• Also bne, blt, ble, bgt, bge
• Comparison instructions
• cmpeq rC, rA, rB if (rA rB)
  rC1, else rC0
• cmpeq, cmpeqi, cmpne, cmpnei
• cmple, cmplei, cmpleu, cmpleui
• Also substitute le above with lt, gt, ge

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Lecture 13

• Examples
• Simple loops, eg do this 5 times
• Calculate 5!
• Calculate 8th Fibonacci number, F8