Instructor: Nachiket M. Kharalkar

1
Introduction to Microcontrollers

• Instructor Nachiket M. Kharalkar
•  
• Lecture 20
• Date 07/25/2007
• E-mail knachike_at_ece.utexas.edu
•  

2
Todays Agenda

• Guest lecture by Mark Welker from AMD on 7/27/7
• Matrices
• Trees
• Reverse Polish notation
• SCI

3
Exam 2

• Average 81
• Highest 100
• Lowest 40

4
Plot window showing one of the mazes. The red
line is the robot car.
X Y 0
Y Actual field 0999
Y 255
X 255
X 0
5
Wall-following solutions may not work
http//www.astrolog.org/labyrnth/algrithm.htm
Does not work
6
Grading policy

• -30 solves the maze with friction off
• -10 solves the maze, but doesnt stop at the end
• -10 gets stuck, or lost so that a reset is
  required to try it again (solves it on the second
  try)
• -20 gets stuck, or lost so that a reset is
  required to try it again (solves it on the third
  try)
• No 4th try
• Questions style graded as usual

7
Matrices
unsigned char M23 // byte matrix with 2
rows and 3 columns
8
Row major allocation

• The elements of each row are stored together
• I be the row index,
• J be the column index,
• n be the number of bytes in each row
• Base is the base address of the byte matrix
• then the address of the element at MI,J is
• BasenIJ

9
Assembly function to access a two by three
row-major matrix

• The row index (0 or 1) is passed in Register A.
• The column index (0, 1, or 2) is passed in
  Register B.
• The base address of the matrix is passed in
  Register X.
• The subroutine returns the value in Register A.
• READ pshb Allocate J and initialize
• ldab 3 number of columns
• mul 3I
• addb 1,s 3IJ
• ldaa B,X read value at MI,J
• rts

10

• ldaa 1 AI1
• ldab 2 BJ2
• ldx M X0910
• bsr Read
• READ pshb Save J
• ldab 3 B3 number of columns
• mul B3 3I
• addb 1,s B5 3IJ
• ldaa B,X A0915 EAXB0915
• rts

11
Column major allocation

• The elements of each column are stored together.
• I be the row index,
• J be the column index,
• m be the number of bytes in each column , and
• Base is the base address of the byte matrix,
• then the address of the element at MI,J is
• BasemJI

12
Assembly function to access a two by three
column-major matrix

• The row index (0 or 1) is passed in Register A.
• The column index (0, 1, or 2) is passed in
  Register B.
• The base address of the matrix is passed in
  Register X.
• The subroutine returns the value in Register A.
• READ aslb Reg B 2J
• abx Reg X base 2J
• ldaa A,X read value at MI,J
• rts

13

• ldaa 1 AI1
• ldab 1 BJ1
• ldx M X0910
• bsr Read
• READ aslb B2 2J
• abx X0912 base 2J
• ldaa A,X A0913,EAAX0913
• rts

14

• Bit arrays can be used to store pixel values for
  graphics
• Placing a 0 into a bit location will display a
  blank.
• Placing a 1 into a bit location will display that
  pixel.
• In assembly, we define the following in global
  RAM,
• Video rmb 48

15

• A graph is a general linked structure without
  limitations
• An acyclic graph is a linked structure without
  loops
• A tree is an acyclic graph with a single root
  node from which a unique path to each node can be
  traced

16
A tree can be constructed with only down arrows,
and there is a unique path to each node
17
A binary tree is constructed so that earlier
elements are to the left and later ones to the
right
18
Definition of a simple binary tree
19
Binary tree search function
20
Nodes are added to a binary tree such that the
alphabetical order is maintained
21
Reverse Polish Notation

• numbers are pushed on the stack,
• values of the variables are pushed on the stack,
• unary function input popped and result pushed,
• binary function both inputs popped and result
  pushed.

22
Examples of Reverse Polish Notation
23
P(M2)(5P)3N M 2 5 P 3 N
24
Serial Communications Interface ( SCI)

• The total number of bits transmitted per second
  is called the baud rate.
• M, selects 8-bit (M0) or 9-bit (M1) data
  frames.
• A frame is the smallest complete unit of serial
  transmission.
• The information rate, or bandwidth, is defined as
  the amount of data or usual information
  transmitted per second.

A serial data frame with M0
25
6812 SCI Details
9S12C32 SCI ports.
26
SCIBD SCIDRL

• SCIBD
• on 9S12C32 MCLK 24MHz (with PLL)
• 4 MHz (otherwise)
• SCI baud rate __MCLK__
• (16BR)
• TE is the Transmitter Enable bit, and
• RE is the Receiver Enable bit.
• SCIDRL register contains transmit and receive
  data
• these two registers exist at the same I/O port
  address
• Reads access the read-only receive data register
  (RDR)
• Writes access the write-only transmit data
  register (TDR)

27
TDRE RDRF

• TDRE is the Transmit Data Register Empty flag.
• set by the SCI hardware if transmit data register
  empty
• if set, the software write next output to SCIDRL
• cleared by two-step software sequence
• first reading SCISR1 with TDRE set
• then SCIDRL write
• RDRF is the Receive Data Register Full flag.
• set by hardware if a received character is ready
  to be read
• if set, the software read next into from SCIDRL
• cleared by two-step software sequence
• first reading SCISR1 with RDRF set
• then SCIDRL read

28
Transmitting in asynchronous mode

• Data and shift registers implement the serial
  transmission.

• The software writes to SCIDRL, then
• 8 bits of data are moved to the shift register
• start and stop bits are added
• shifts in 10 bits of data one at a time on TxD
  line
• shift one bit per bit time (1/baudRate)

29
Receiving in asynchronous mode
Data register shift registers implement the
receive serial interface

• The receiver waits for the 1 to 0 edge
  signifying a start bit, then
• shifts in 10 bits of data one at a time from
  RxD line
• shift one bit per bit time (1/baudRate)
• start and stop bits are removed
• checked for noise and framing errors
• 8 bits of data are loaded into the SCIDRL

30
Three receive data frames result in an overrun
(OR) error

• If there is already data in the SCDR when the
  shift register is finished, it will wait until
  the previous frame is read by the software,
  before it is transferred.
• An overrun occurs when there is one receive frame
  in the SCDR, one receive frame in the receive
  shift register, and a third frame comes into RxD.

31

• A device driver is a collection of software
  functions that allow higher level software to
  utilize an I/O device.
• Collection of public methods (subroutines)
• SCI_Init
• SCI_InChar
• SCI_OutChar
• Collection of private objects (subroutines,
  globals, I/O ports)
• SCICR2
• SCIBD
• SCISR1
• SCIDRL
• Complexity abstraction
• divide a complex problem into simple
  subcomponents
• Functional abstraction
• divide a problem into modules
• grouped by function

32
SCI I/O Programming

• Initalize 9S12C32 SCI at 250000 bps
• Inputs none
• Outputs none
• Errors none
• assumes 4MHz E clock (PLL not activated)
• SCI_Init
• movb 0c,SCICR2 enable SCI TERE1
• movw 1,SCIBD 250000 bps
• baud rate (bps) 250000/BR
• rts

33
SCI_InChar
Busy-waiting, gadfly, or polling are three
equivalent namessoftware continuously checks the
hardware status waiting for it to be ready
34
SCI_OutChar
35
ASCII strings

• Stored with null-termination
• In C, the compiler automatically adds the zero at
  the end
• In assembly, the zero must be explicitly defined
• Msg fcc EE319K is fun
• fcb 0
• Msg2 fcb EE319K is fun,0

36
Strings Arrays

• A string is a data structure
• with equal size elements
• only allows sequential access
• always read in order from the first to the last.
• An array is a data structure
• with equal size elements
• allows random access to any element in any order

37
A variable length string contains ASCII data
38
SCI Demo