Chapter 2 Introduction to Computer Architecture and Assembly Language

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Chapter 2 Introduction to Computer
Architecture and Assembly Language
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Computer Architecture

• Interface between hardware and the lowest level
  of software
• Assembly language programmers view of the
  processor
• 3 major components of a computer
• 1. CPU (Central Process Unit)
• 2. Memory
• 3. I/O Devices
• The components are interconnected by System Bus.

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Assembly Language

• A low-level, human-readable representation of
  the binary code executed by a computer.
• A language that controls the primitive
  operations on binary data.
• Basic operations include data movement,
  addition, subtraction, comparison, shifting and
  branching.

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Computer Architecture - Languages
Applications
HHL ? Complier Assembly Language ?
Assembler Machine Language
High Level Language
Low Level language
Hardware
Assembly Language
C, JAVA
Word, Excel
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Von Neumann Machine(Stored Program Computer)

• The common memory system stores both the
  instructions and the data.

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Memory
Address transferred from CPU
Address

• Array of cells storing data (data/instructions),
  each cell has an unique address
• Address port, data port, control signals.
• Read cycle data at the specified memory address
  is placed on the data bus.
• Write cycle data on the data bus is written into
  the specified memory location.

0000
0001
0002
Read
Write
Data
Data transferred between CPU and memory
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Central Processor Unit (CPU)

• Responsible for reading instructions from the
  memory and executing them.
• Address path used by CPU to provide memory
  address of instruction or data to the memory.
• Data path used by CPU/memory to transfer data.

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Basic von Neumann Instruction Format

• An instruction consists of operation code and the
  operand address
• Could have more than one addresses, later
• Operation code (op-code) defines what the
  instruction does.
• Operand address (address) where the operand is
  located referred to as the address field

Operation Code
Operand address
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Von Neumann machine in Pseudo code

• Von Neumann machine operates in a two-phase
  mode, fetch/execute cycles.

• Module Von_Neumann
• I 0
• Repeat
• Fetch an instruction from memory location I
• I I 1
• Execute the instruction
• Forever
• END Von_Neumann

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Pseudo code for execution

• Module Execute the instruction
• Decode the instruction
• IF instruction requires data, THEN
• Fetch the data from the memory
• END_IF
• Perform operation defined by instruction
• IF instruction requires data to be saved, THEN
• Save the data in memory
• END_IF
• End Execute the instruction

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Information Flow between CPU and Memory
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CPU Components

• Arithmetic and logic unit (ALU) calculation
• Control unit (CU) interprets the instruction

Memory
CPU
Address
Address
Address bus
Instruction Instruction Data
Registers
Control bus
ALU
CU
Data bus
Data
Data
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CPU Components

• Registers temporary storage
• Program counter (PC) holds the address of the
  next instruction to be executed.
• Instruction register (IR) holds instruction
• Data registers hold data
• Address registers hold addresses
• Condition code register (CCR) flag bits
• Updated to reflect operation result
• Used to change flow of program
• MAR, MBR, PSW, etc. (later)

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Register Transfer Language (RTL)

• A simple language to describe the operations
  carried out by CPU.
• We will use it to describe the function of
  instruction
• 4 or M(4) means the content of memory
  location 4.
• M(6) 4 means the content of memory location 6
  is the value 4.
• M(6) lt- 4 means assigning the number 4 to the
  memory location 6.

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Assembly Language

• A form of the native language of a computer in
  which
• - machine code instructions are represented by
  mnemonics
• e.g., MOVE, ADD, SUB
• - addresses and constants are usually written
  in symbolic form
• e.g., NEXT, BACK_SP

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MC68000 Assembler

• Valid symbolic name contains up to 8 letters or
  number.
• Name starts with letter.
• TempVa123, TempVa127 are recognized as TempVa12
  by assembler

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Files Created by Assembler
Listing File
Source File
Assembler
Editor
Binary File

• Binary file or object file is recognized by
  machine.
• Listing file contains the information of program
  assembling.
• If a program written in more than one files,
  LINKER is needed to link the object files
  together before execution.

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Assembly Language Program

• Two types of statements
• 1. Executable instructions
• 2. Assembler directives
• Executable instruction
• - translated into machine code by assembler
• - tells the machine what to do at execution

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Assembly Language Program

• Assembler directives
• - tell assembler what to do when program
  assembled
• - are not translated into machine code, they
  are non-executable.
• E.g., EQU, DC, DS, ORG, END

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Assembly Language Program

• Program written in 4 columns
• label instruction operand comment
• - Label begins in column 1
• programmer-defined
• reference to a line
• 50 is 5016, 10 is 00000010, 50 is 5010.
• Longword 32-bit, Word 16-bit, Byte 8-bit.
• A line begins with an in its first column is
  a comment -gt ignored by the assembler

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Sample Program

• BACK_SP EQU 08 ASCII code for backspace
• DELETE EQU 01 ASCII code for delete
• CAR_RET EQU 0D ASCII code for carriage
  return
• ORG 00400 Data origin
• LINE DS.B 64 Reserve 64 bytes for line
  buffer
• Input a character and store it in a buffer
• ORG 001000 Program origin
• LEA LINE,A2
• NEXT BSR GET_DATA
• CMP.B BACK_SP,D1
• BEQ MOVE_LEFT
• CMP.B DELETE,D1
• BEQ CANCELL
• CMP.B CAR_RET,D1
• BEQ EXIT
• MOVE.B D1,(A2)
• BRA NEXT
• MOVE_LEFT LEA -1(A2),A2
• BRA NEXT

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How Assembler Works

• Two-pass assembler
• Source program scanned twice before producing
  the object code
• LC Assemblers simulation of PC
• When an assembly program is assembled, LC is used
  to keep track of the memory location at which
  an instruction would be should that instruction
  be executed.
• So that machine code can be generated correctly
  from assembly code.

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How Assembler Works

• Pass I
• Search source program for symbol definitions and
  enter these into symbol table
• Pass II
• Use symbol table constructed in Pass I and
  op-code table to generate machine code equivalent
  to source

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Pass I (Simplified)
START
LC lt- 0
Fetch Next Instruction
Y
END?
PASS II
N
Y
Label?
Add Label to Symbol Table w/ LC as its value
Increment LC Accordingly
N
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Pass II (Simplified)
START
LC lt- 0
Fetch Next Instruction
Y
END?
STOP
N
Increment LC Accordingly
Generate Machine Code
Symbol Table Lookup
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Example
Machine Code
Assembly Code
LC
1 OPT
CRE 2 00000019 A EQU
25 3 00001000 ORG
1000 4 00001000 00000004 M
DS.W 2 5 00001004 00001008 N
DC.L EXIT 6 00001008 2411
EXIT MOVE.L (A1),D2 7 0000100A
139A2000 MOVE.B (A2),(A1,D2)
8 0000100E 06450019 ADDI.W
A,D5 9 00001012 67000008 BEQ
DONE 10 00001016 90B81004
SUB.L N,D0 11 0000101A 60EC
BRA EXIT 12 0000101C 4E722700
DONE STOP 2700 13
00001000 END 1000 Lines
13, Errors 0, Warnings 0. SYMBOL TABLE
INFORMATION Symbol-name Type Value
Decl Cross reference line numbers A
EQU 00000019 2 8. DONE
LABEL 0000101C 12 9. EXIT
LABEL 00001008 6 5, 11. M
LABEL 00001000 4 NOT USED N
LABEL 00001004 5 10.
What we care in the symbol table
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EQU (EQUate) Link a name to a value
Length EQU 30 Width EQU 25 Area EQU LengthWidth

• The code doesnt need modified, even if the
  length and the width changed,
• It tells reader how the Area is computed.

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ORG (ORiGin)

• Sets up value of location counter (LC)
• LC Assemblers simulation of PC

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DC (Define a Constant) Define and initialize
a variable Qualified by .B, .W, or .L
(byte, word, or longword)
Memory Map

001001
001000
ORG 00001000 FIRST DC.B 10,66 DC.L
0A1234 ...
001003
001002
001005
001004

• Loads constant into the memory in hexadecimal
• A 16-bit word should not be stored across the
  even boundary, e.g. at 1001

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Demonstration
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DS (Define Storage) Reserves (allocates)
storage location in memory Similar to DC, but
no values stored DC set up values in memory
locations DS reserve memory space for
variables Example on page 68
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Example
01000
TABLE
ORG 001000 TABLE DS.W 256 POINTER_1
DS.L 1 VECTOR_1 DS.L 1 INIT DC.W
0,FFFF ORG 018000 ENTRY LEA ACIAC,A0
MOVE.B SETUP1,(A0)
011FF
01200
POINTER_1
01201
01202
01203
01204
VECTOR_1
01205
01206
01207
01208
INIT
00
01209
00
0120A
FF
0120B
FF
0120C
18000
ENTRY
41
F9
18001
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END End of program
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More on Instruction Format

• An instruction is an op-code followed by
  address(es)
• Address means any address in system
• General Instruction Formats
• Four-address format
• Op-code Src1 Src2 Dst NextInstr
• x y z
• Src1 y, Src2 z, Dst x

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More on Instruction Format

• General Instruction Formats (Contd)
• Three-address format
• Op-code Src1 Src2 Dst
• Use program counter for next instruction
• Two-address format
• Op-code Src1 Src2 (and Dst)
• x y x
• Src1 y, Src2 and Dst x
• 68000 uses two-address format

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More on Instruction Format

• General Instruction Formats (Contd)
• One-address format
• Op-code Src1
• Accumulator (AC) is Src2 and DST
• AC AC y
• Zero-address format
• Op-code
• Use stack
• Post-order expression

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Example

• I J K
• Four-address format
• ADD J, K, I, NEXT I J K
• next instruction in location NEXT
• Three-address format
• ADD J, K, I I J K
• next
  instruction in PC
• Two-address format
• MOVE J, I I J
• ADD K, I I K I

How about ADD K, J MOVE J, I
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Example

• I J K
• One-address format
• LOAD J AC J
• ADD K AC J K
• STORE I I AC
• Zero-address format, postfix I JK
• LOAD J push J onto stack
• LOAD K push K onto stack
• ADD pop and add J and
  K, result on top
• STORE I pop stack top to I

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More Examples

• I J K L
• I J K L
• I (J K) L
• I (J K) L M
• I J K L M
• I J K (L M)
• I (J K) (L M)