Embedded Systems in Silicon TD5102

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Embedded Systems in SiliconTD5102
Henk Corporaal http//www.ics.ele.tue.nl/heco/cou
rses/EmbSystems Technical University
Eindhoven DTI / NUS Singapore 2005/2006
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Goal
Treating how to design and map applications
efficiently on future programmable platforms

• Special emphasis on
• efficient data management for high performance
  and low power
• the exploitation of parallelism at instruction
  and task level
• platforms processor components
• in particular RISC and VLIW architectures and
  accelerators
• FPGA design flow

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What is System Design ?
Platform constraint
Data mgmt
Concurrency mgmt
Platform integration
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What do you learn?

• a methodology for a step-wise (code)
  transformation and mapping trajectory
• going from an initial specification to an
  efficient and highly tuned platform
  implementation
• what is a RISC architecture, how is it
  implemented?
• what are ILP architectures and how do they
  operate?
• In particular about VLIW type of architectures
• code generation principles
• implementation design flow
• FPGA architecture details

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Topics details

• Design flow overview
• System Specification
• Data Management
• Exploitation of Operation Parallelism (e.g. ILP
  code generation)
• Task Concurrency Management
• MIPS processor design
• Future Processing Platforms components like VLIWs
• SystemC

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When and where

• Everyday
• 12 3 hours
• Dec 5 Dec 16, Jan 5, 6
• Time
• 18.00 21.00 h
• Place
• E4-04-05 (Dec) / E4-04-06 (Jan)

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Proposed course schedule

• Introduction Overview
• RISC architectures MIPS ISA (instruction set
  architecture)
• handout Lab 1 MIPS assembly programming
• MIPS implementation (1) and SystemC
• MIPS implementation (2)
• handout Lab 2 MIPS implementation
• FPGA architecture, design flow and tool chain
• handout Lab 3 FPGA circuit design and EDK
  toolflow
• Data Management (1) including Loop
  Transformations
• Data Management (2)
• handout Lab 4 Optimizing Data Memory Hierarchy
  use
• Platforms and ILP architectures
• Code generation
• Code generation
• Other architectures including TTAs
• Wrap up

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Labs

• MIPS assembly programming
• use of SPIM
• MIPS implementation
• use of mmMIPS and mMIPS
• SystemC (see www.systemc.org)
• FPGA design flow and fast prototyping
• design a simple circuit
• perform the EDK tutorial
• Optimizing a C application for efficient use of
  processor memory hierarchy

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Miscellaneous

• Material
• Slides
• Papers
• Your own notes
• Book Patterson and Hennessy Computer
  Organization and Design (3nd Edition)
• Examination (oral, 11-12 Jan 2006)
• Final examination 50
• Lab. Exercises 50 (have to write and
  defend lab report)