From LeadingEdge Advanced CMOS to Nanotechnology Devices

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From Leading-Edge Advanced CMOS to Nanotechnology
Devices
EEL 4329 / EEL 5934 FALL 2006 Instructor Prof.
Scott Thompson 535 Engineering
Bldg 846-0320 thompson_at_ece.ufl.edu
Office hours M, W, F 7th period
(plus email for more)
MWF 8th period / NEB 102
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What is Moores Law
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Moores Law

• According to Moore
• 0.7X linear scale factor
• 2X increase in density / 2 years
• Lower cost
• Higher performance (30 / 2 years)
• At severe competitive disadvantage if dont
  have newer technology
• Has been going on for 40 years and will
  continue somewhat for another decade

1st signs of this being no longer valid is some
markets
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Pentium Processors in
1993
1994
1995
1998
1997
1999
0.8µm
0.6µm
0.35µm
0.25µm
0.35µm
0.18µm
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CLASS GOAL

• This class will expose the student to state of
  the art technology issues and industrial team
  problem solving. The class will provide links
  between the short-term topics, which will
  certainly be in production during the next 10
  years such as nano-scale MOSFET, strained Si,
  high k gates to far-reaching topics, which are
  well ahead or off the main stream, offering high
  Potential . Some of these topics will include
  carbon nanotubes, molecular electronics and
  single electron devices for logic applications.

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Relevance

• At present silicon technology is IT however
  Moores Law will slow over the next decade and
  will have a profound effect on industry and
  university business and engineering jobs. The
  slowing should not be viewed as an end just a new
  phase in the 300B microelectronic industry were
  the rules of business change.

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Relevance
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Gordon Moore on Moores Law and the future of
Microelectronics

• Show Moore video
• Interviews by Grove, Barret, Mead
• Discussion of key takeaways

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Grading

• Grading Homework/team project assignments and
  team project.
• Exams 85
• 25 Exam 1 Sept 27
• 25 Exam 2 Nov 3
• 35 Final exam (Dec 12 10am 12)
• 15 homework/real world semiconductor team
  research project
• Class divided into 10 groups
• 5 10 min group periodic report out
• Final report
• Part peer evaluation

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Text book Nanoelectronics and Information
Technology
Plus many handouts on CD ROM

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Perquisite

• Basic knowledge of semiconductor physics and
  devices (EEL 3396 or eq.). The class will be
  introductory and targeted towards students with a
  diverse background from electronics to material
  science. The class will be designed to introduce
  CMOS, non classical CMOS, and post CMOS device
  concepts without a quantum mechanical background.

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Course Outline

• Week 1-2 Moores Law and microelectronic
  industry trends
• Week 3 Logic device State of the Art for a
  Si MOSFET
• Week 4 Requirements for a logic device
  replacement
• Week 5-6 CMOS devices limits
  quantum-statistical
• Week 7-11 Post CMOS logic device
• - Multi-Gate CMOS
• - Carbon nanotubes
• - High level overview of Quantum Transport
  Devices
• - Single electron devices for Logic
  applications
• - Spintronics
• Midterm exam Oct 20th
• Week 12-14 Memory devices
• DRAM, ferroelectric, magneto resistive, and
  phase change RAM
• Week 16 December 8th and 10th
• Final exam when scheduled by college

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Course Material

• Week 1-6
• 1.1 Introduction class / Video
• 1.2 short 300mm fab vide Moore on Moores law
• 1.3 Intels view on nanotechnology
• 2.1 IBM view on nanotechnology
• 2.2 Taur/Isaac papers
• 2.3 State of the art MOSFET
• 3.1 Holiday
• 3.2 How work report out
• 3.3 How strain works / band structure and
  strain
• 4-6 Requirements and limits of devices

High level overview to put the material in
perspective
Equations and mathematics
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CLASS / Team Project (assigned Mid Year)

• Compare post CMOS replacement device options to
  the MOSFET (most successful device technology)
• Which if any post CMOS device options should the
  microelectronics focus on as a MOSFET
  replacement?
• Recommendation should be based
• Historical and projected future MOSFET trends.
• On quantum, statistical mechanics, and device
  limits.
• Potential advantage of post CMOS device option.
• Class homework will help shape project
• Suggestions Start with a good literature
  search. Use excellent free service of electronic
  journals on-line. Use Mathlab for calculations
  and graphs.
• Group divided into 10 Teams

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Homework 1

• Why has GaAs or 3-5 devices not taken off
• Include
• Early history of GaAsfind interesting quotes
  (see who can find the best quotes) on GaAs
  potential
• What markets is GaAs used today
• What is it not replaceing CMOS
• Expectation
• Present 6-7 ppt slides for a professional
  presentation to class
• 1 page report with references
• Due Sep 11th
• Can pick your own groups 4-6 people/group

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Course Material (papers provided on CD)

• Week 1
• Silicon MOSFET Novel materials and Alternative
  concepts Ch-13 text book pages 361-385
• (Skip operation of MOS capacitor / High K
  deposition
• Isaac paper The Future of CMOS
• Taur CMOS design near the limit of scaling
• EEtimes nano technology article
• Week 2
• Denard Design of ion implanted MOSFET
• Sustaining Moores Law and the US Economy
• Week 3
• Intel 90nm Strained silicon

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Course Material (papers on CD)

• Week 4-6
• Miendl- low power microelectronics
• Limits to a binary switch
• Book pages 323-357 (skip biological system)
• Week 7-11
• Book chapters 19, 16
• Single electron devices and their application
• Spintronics a spin based electronics vision for
  the future
• Week 12-16
• Book chapters 21-23
• Introduction to flash memory

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Other

• Class attendance required. Class
  attendance/participation used to decide close
  grades (i.e. A or B?)
• No make-up exam/homework unless very good reason.
  See me. Will be handled on case by case basis
• Student with disability Students requesting
  classroom accommodation must first register with
  the Dean of Student Office. The Dean of Students
  Office will provide documentation to the student
  who must then provide this documentation to the
  instructor when requesting accommodations.
• Expect on time to class. No cell phones
• University honesty policy