Title: Signal Integrity Analysis of highspeed interconnects
1Signal Integrity Analysis of high-speed
interconnects
- Alexandra Oltean Karlsson
- IT-DES
2Overview
- Need for electromagnetic simulation and circuit
simulation at CERN - Look at the existent tools at CERN
electromagnetic field solvers and circuit
simulators - Test compatibility between tools
- Two case studies
3Need for simulation
- CERN is involved with more complex systems
(detectors, accelerators) and higher-speed
electronics - Need for electromagnetic (EM) simulation
- Use EM field solvers
- Analyse complex/arbitrary 3D geometries
- Provide design rules and guidelines
- Optimize design
- Need for system and circuit simulation
- Perform analysis at the electronics board-level
- Account for Signal Integrity
- Make sure design can meet specifications
4EM Field Solvers at CERN
- Ansoft HFSS
- HFSS is a frequency domain full-wave field solver
- HFSS uses Finite Element Method to solve
Maxwells equations in the frequency domain - HFSS results are E/H fields, S-parameters, Z, Y
matrices - CST Microwave Studio (MWS)
- MWS is a time domain field solver
- MWS uses Finite Integration Technique to solve
Maxwells equations in the time domain - MWS results are time-domain signals, Z,
indirectly computed S-parameters - Others ANSYS, Flex3D, Tosca
5Circuit Simulators at CERN
- Basic circuit simulators integrated with the
field solvers - (Not always good enough)
- CST Design Studio
- General purpose non-linear circuit simulators
- Synopsys HSpice (de facto non-linear simulator)
- Cadence PSpice
- Specific tools for Signal integrity analysis
- Cadence Allegro PCB SI (old SpecctraQuest) -
tlsim or HSpice simulator - General purpose non-linear and linear circuit
simulators - Applied Wave Research (AWR) APLAC or HSpice
simulator
6Case Studies
- Case Study1
- the Low Mass Cable (LMC) used by the ALICE
Silicon Pixel detector and the NA-48 Gigatracker - Case Study2
- a critical geometry - differential Via
existent on the Processing trigger board for LHCb
Muon trigger
7Case Study 1 -Low Mass Cable (LMC)
- Data rate through the data lines is 2.5Gbps
- The goals are
- to FIND an optimum design for this LMC within
given constraints such that a - minimum amount of crosstalk noise will be induced
in the data lines from the - adjacent traces
- to GET a model for the LMC which can be used in
a circuit simulator to validate - the compatibility between the LMC and the
detector read-out chip
8LMC in HFSS
- A simulation in HFSS is a long and a
computationally expensive process - using large amount of RAM
- depending on the geometry complexity
- Break the complexity of the LMC into two
geometries - Go through several iterations before finding the
right setup
9HFSS Methodology
Draw the 3D geometry
Define materials
Aluminium
Kapton
Define boundaries Define excitations
Specify project settings
SOLVE
10HFSS analysis results (1)
Take out the GND shielding
-60dB
Similar crosstalk results even when NO shielding
at all! Design rule 1 The GND shield is not
necessary - take it out and economize Aluminum
11HFSS analysis results (2)
Bring VDD traces closer to the serial lines
Crosstalk level increases by bringing the power
closer to the serial lines, but the overall level
is still acceptably low! Design rule 2 bring
power closer to the lines
12HFSS analysis results (1)
Take out the GND shielding
S11
Similar crosstalk results even when NO shielding
at all! Design rule 1 take out the GND shield
13HFSS analysis results (2)
Bring closer to each others the lines
Crosstalk level increases by bringing closer the
traces but stays below -55dB at 25GHz! Design
rule 2 bring traces closer each other ? shrink
the width of the LMC
14System Simulation
Field solver
From HFSS, we obtained a model for the whole LMC
Circuit simulator
Detector
Front-end electronics
TX
RX
Read-out chip
FPGA
Low Mass Cable
15LMC integration with the read-out electronics
- The read-out chip is a custom designed ASIC by
the Microelectronics Group at CERN - The read-out chip drives with 2.5Gbps signal the
LMC - - the output at an ideal single and differential
receiver
Read-out TX?LMC ? RX (Single)
Read-out TX?LMC ? RX (Differential)
16Case Study 1 - Conclusions
- Fullwave electromagnetic analysis in Ansoft HFSS
can be used to design the LMC - From the analysis of the LMC the following design
rules have been derived - GND shielding could be removed
- VDD power traces could be brought closer to the
serial lines - control lines could be brought closer to each
others - We obtained an HSpice model for the whole LMC
- HSpice simulation validates the compatibility of
the LMC to the read-out chip - The differential output after LMC has acceptable
signal characteristics
17Case Study2 LHCb Trigger board
TX
- Trigger processing board for LHCb
- Design speed is 1.6Gbps
- The goals are
- - to obtained a model for the Vias
- - to integrate this model within the
transmission channel simulation from TX to RX
Vias
PCB trace
Vias - 3D geometry
RX
Vias
18Microwave Studio Methodology
Draw 3D geometry
Copper
Assign materials
FR4
Define frequency range
TX
Define boundaries and ports
SOLVE
RX
19Vias Analysis in MWS
- CST MWS results
- Left S-parameters (Frequency-domain indirect
results) - Right - Time-domain results
20HSpice board level simulation
TX
RX
Measurement
Simulation
21Case Study2 - Conclusions
- A pair of differential vias on a high-speed board
has been modeled with CST MWS - The HSpice model exported from MWS was simulated
with HSpice - The MWS Via model was then used within a
transmission path on the real board - The simulation result has been successfully
compared to the measurement.