Sponsored By

1
Rapid Systems Prototyping Laboratory (RASP)
www.ece.uprm.edu/rasp
David Ortiz M.S. Student Antonio Ocasio B.S.
Student Email david.ortiz_at_ece.uprm.edu anbuelite
_at_gmail.com RASP Group, ECE Department RASP
Group, ECE Department Prof. Nayda Santiago
Advisor University of Puerto Rico, Mayagüez Campus
The degree of effectiveness of an FPGA
implementation depends on the target goal of
design. This work presents methods,
instrumentation techniques, and metrics used to
assess the effectiveness of FPGA implementations.
One important issue in this study is the existing
benchmarks used to compare the performance of
different FPGA architectures. The target platform
for our implementation is the WILDSTAR II PRO PCI
board. We present the WILDSTAR architecture,
Xilinx design flow, and a user guide for this
board. We have seen that due to current
applications in academy and industry, the
predominant performance metrics used are speed
and area.
We are interested in evaluating speed and area in
different FPGA platforms and analyze the effect
that the architecture has on the behavior of the
SAR radar algorithms that are going to be
implemented on FPGAs. We have seen that the most
commonly used parameter to evaluate performance
on FPGAs is the speed of data transfer among its
interconnection networks and CLB architecture.
Following there are some pictures of packages for
instrumentation debugging 1, 2.
Performance is a measure of how well a system
works. Performance metrics are a set of
parameters that can be measured to analyze the
behavior of the system under study in order to
make statistical comparisons between systems.
Performance evaluation requires certain knowledge
of the system into consideration and a careful
selection of the methodology and tools to be
used.
  Figure 3 Xilinx Measurement Core Diagram
Results and Conclusions

• We identified of the main parameters that
  describe the behavior of a FPGA
• Speed.
• Delay.
• Area.
• Routability.
• Power consumption of the design synthesized
  onto the FPGA.
• Literature presents a series of benchmark
  circuits designed to test the behavior of
  different architectures of FPGAs.
• We plan to design experiments to evaluate the
  performance of different platforms.
• We investigated some performance
  instrumentation methods in the literature, and
  found that FPGAs debugging may be done by
  simulation of the system and by direct system
  execution.

Future Work

• Design experiments to measure FPGA performance
  on different platforms
• Begin a study of different DSP performance
  metrics in order to compare the processing
  behavior of SAR algorithms implemented on DSPs
  and FPGAs
• Implement some DSP benchmarks used in the
  literature to evaluate DSP performance metrics,
  such as execution time, and loads and stores,
  among others 4.

  Figure 4 WILDSTAR II PRO PCI Board

• The WILDSTAR II architecture is described in
  terms of processing elements.
• The host computer communicates with each PE
  (processing element) via the board PCI
  controller.
• The PCI controller accesses the PEs by the
  Local Address Data (LAD) bus.
• The WILDSTAR II PRO PCI board has two
  processing elements each one has a VIRTEX II PRO
  XC2VP70 FPGA. Both processing elements use large
  buses to provide data throughput to I/O cards 3.

1 Graham, P. Nelson, B. Hutchings, B.
Instrumenting bitstreams for debugging FPGA
circuits, The 9th Annual IEEE Symposium on
Field-Programmable Custom Computing Machines,
2001. FCCM 01, pages 41 50, 2001. 2
www.xilinx.com/cell 3 WILDSTAR II Hardware
Reference Manual, Annapolis Micro Systems, Inc.
Annapolis, MD. 4 Sair, S. Olivadoti, G. Kaeli,
D. Fridman, J. DSPTune A performance evaluation
toolset fir the SHARC signal processor,
Simulation Symposium, 2000. (SS2000) Proceedings.
33rd. Annual, pages 51 57, 2000.
  Table 1 Literature Review Summary
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