Modem Design, Implementation, and Testing Using NI

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Modem Design, Implementation, and Testing Using
NIs LabVIEW

• Prof. Brian L. Evans
• Dept. of Electrical and Computer Engineering
• The University of Texas at Austin, Austin, Texas
  USA
• bevans_at_ece.utexas.edu
• Visiting Associate Professor
• American University of Beirut, Beirut, Lebanon

Contributions by Vishal Monga, Zukang Shen, Ahmet
Toker, and Ian Wong, UT Austin
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Outline

• Real-Time Digital Signal Processing (DSP)
  Laboratory Course
• Single Carrier Transceiver
• Sinusoidal Generation
• Digital Filters
• Data Scramblers
• Pulse Amplitude Modulation
• Quadrature Amplitude Modulation
• Conclusion

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Real-Time DSP Course Overview

• Objectives of undergraduate class
• Build intuition for signal processing concepts
• Translate signal processing concepts
  intoreal-time digital communications software
• Lecture breadth (three hours/week)
• Digital signal processing algorithms
• Digital communication systems
• Digital signal processor architectures
• Laboratory depth (three hours/week)
• Deliver voiceband modem
• Design is the science of tradeoffs (Prof. Yale
  Patt, UT)
• Test/validate implementation

Over 600 served since 1997
Web site http//www.ece.utexas.edu/bevans/cours
es/realtime/ Download site http//www.ece.utexas
.edu/bevans/courses/realtime.zip
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Real-Time DSP Course Overview

• Embedded system demand volume, volume,
• 400 Million units/year automobiles, PCs, cell
  phones
• 30 Million units/year ADSL modems and printers
• Consumer electronics products
• How much should an embedded processor cost?

Source CEA Market Reseach. Data for 2004
calendar year.
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Real-Time DSP Course Overview

• Digital signal processor market 1990-2000
• 40 annual growth
• 1 in growth within semiconductor market
• Worldwide revenue (US dollars)
• 6.1B 00, 4.5B 01, 4.9B 02, 6.1B 03, 8.0B
  04
• Estimated annual growth of 23 for 2003-2008
• Market share (based on 2002 revenue)
• 43 TI, 14 Freescale, 14 Agere, 9 Analog Dev.
• Fixed-point vs. floating-point DSPs
• gt90 of digital signal processors sold are
  fixed-point
• Floatingpoint DSPs used for initial real-time
  prototype
• How many digital signal processors are in a PC?

Revenue figures from Forward Concepts
(http//www.fwdconcepts.com)
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Real-Time DSP Course Which DSP?

• Students are next-to-final year (junior) and
  final-year (senior) undergraduate students
• Fixed-point DSPs for high-volume products
• Battery-powered cell phones, digital still
  cameras
• Wall-powered ADSL modems, cellular basestations
  
• Fixed-point issues
• Using non-standard C extensions for fractional
  data
• Converting floating-point programs to fixed-point
• Manual tracking of binary point prone to error
• Floating-point DSPs
• Feasibility for fixed-point DSP realization
• Shorter prototyping time
• Program TI TMS320C67x DSP in C
• TI Code Composer Studio 2.2

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Real-Time DSP Course Textbooks

• C. R. Johnson, Jr., and W. A.Sethares,
  TelecommunicationBreakdown, Prentice Hall, 2004.
• Intro to digital communicationsand transceiver
  design
• Matlab examples
• S. A. Tretter, Comm. System Design usingDSP
  Algorithms with Lab Experiments forthe
  TMS320C6701 TMS320C6711, 2003.
• Assumes DSP theory and algorithms
• Assumes access to C6000 reference manuals
• Errata/code http//www.ece.umd.edu/tretter

Rick Johnson (Cornell)
Bill Sethares (Wisconsin)
Steven Tretter (Maryland)
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Lab 1. QAM Transmitter Diagram
Lab 4Rate Control
LabVIEW demo by Zukang Shen (UT Austin)
Lab 6 QAM Encoder
Lab 2 PassbandSignal
Lab 3Tx Filters
http//www.ece.utexas.edu/bevans/courses/realtime
/demonstration
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Lab 1. QAM Transmitter Diagram
LabVIEW Control Panel
QAM Passband Signal
Eye Diagram
LabVIEW demo by Zukang Shen (UT Austin)
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Lab 1. QAM Transmitter Diagram
passband signal for 1200 bps mode
square root raise cosine, roll-off 0.75, SNR ?
passband signal for 2400 bps mode
raise cosine, roll-off 1, SNR 30 dB
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Lab 2. Sine Wave Generation

• Aim Evaluate three waysto generate sine waves
  insignal quality vs. complexity
• Function call
• Lookup table
• Difference equation
• Three output methods
• Polling data transmit register
• Software interrupts
• Direct memory access (DMA) transfers
• Expected outcomes are to understand
• Signal quality vs. implementation complexity
  tradeoff
• C6701 EVM boards stereo codec operation
• Interrupt mechanisms and DMA transfers

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Lab 2. Sine Wave Generation

• Evaluation procedure
• Validate sine wave frequency on scope, and test
  for various sampling rates (14 sampling rates on
  board)
• Method 1 with interrupt priorities
• Method 1 with different DMA initialization(s)

Spring 2004
Fall 2003HP 60 MHz Digital Storage Oscilloscope
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Lab 3. Digital Filters

• Aim Evaluate four ways to implementdiscrete-time
  linear time-invariant filters
• FIR filter convolution in C and assembly
• IIR Filter direct form and cascade of biquads,
  both in C
• IIR filter design gotchas oscillation
  instability
• In classical designs, poles sensitive to
  perturbation
• Quality factor measures sensitivity of pole pair
  Q ? ½ , ? ) where Q ½ dampens and Q ?
  oscillates
• Elliptic analog lowpass IIR filter dp 0.21 at
  wp 20 rad/s and ds 0.31 at ws 30 rad/s
  Evans 1999

Q poles zeros
1.7 -5.3533j16.9547 0.0j20.2479
61.0 -0.1636j19.9899 0.0j28.0184
Q poles zeros
0.68 -11.4343j10.5092 -3.4232j28.6856
10.00 -1.0926j21.8241 -1.2725j35.5476
optimized
classical
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Lab 3. Digital Filters

• IIR filter design for implementation
• Butterworth/Chebyshev filters specialcases of
  elliptic filters
• Minimum order not always most efficient
• Filter design gotcha polynomial inflation
• Polynomial deflation (rooting) reliable in
  floating-point
• Polynomial inflation (expansion) may degrade
  roots
• Keep native form computed by filter design
  algorithm
• Expected outcomes are to understand
• Speedups from convolution assembly routine vs. C
• Quantization effects on filter stability (IIR)
• FIR vs. IIR how to decide which one to use

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Lab 3. Digital Filters

• Test Equipment
• Agilent Function Generator
• HP 60 MHz Digital Storage Oscilloscope
• Spectrum Analyzer
• Evaluation Procedure
• Sweep filters with sinusoids to construct
  magnitude and phase responses
• Manually using test equipment, or
• Automatically by LabVIEW DSP Test Integration
  Toolkit
• Check filter output for cut-off frequency,
  roll-off factor
• FIR Compare execution times (in Code Composer)
  of
• C without compiler optimizations
• C with compiler optimizations
• C callable assembly language routine
• IIR Compute execution times (in Code Composer)

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Conclusion

• Objectives
• Build intuition for signal processing concepts
• Translate signal processing concepts
  intoreal-time digital communications software
• Deliverables and takeaways
• Deliver voiceband transceiver
• Tradeoffs in signal quality vs. implementation
  complexity
• Test/validate implementation
• Extend hands-on experience to broadband modems
• Role of technology
• TI DSPs and Code Composer Studio
• NI LabVIEW and DSP Test Integration Toolkit