CALICE TPAC1'1: Power Plan

1
CALICE TPAC1.1 Power Plan
42 pix
84 pix

• (Top Level)

2
VDD1V8pix VSSGpix
?1.1
3
VDD1V8aco VSSGaco
?1.1 (new mesh)
4
VDD1V8dco VSSGdco
?1.1
5
VDD1V8mso VSSGmso
?1.1 (attn!)
Horizontal links between sub-arrays missing! TO
DO
6
VDD1V8sram VSSGsram
?1.1
7
VGUARD (not yet used)
?1.1
8
Vth(/-) Vcasc(s)
?1.1
Vth12
Vth34
Vcascs,
Vbiases
9
VDD1V8dig VSSGdig
?1.1
10
VDDO VSSO (3.3v max)
11
VDD2V5dig (3.3v for SRAM WrEn)
?1.1 (review)
12
Pixel Identification
Row 0 Row 1 Row 2 etc GRAY Row 83
0,1,2,3 42
0,1,2,3 42
0,1,2,3 42
0,1,2,3 42
Row 84 Row 85 Row 86 etc GRAY Row 167
0,1,2,3 42
0,1,2,3 42
0,1,2,3 42
0,1,2,3 42