MILAN

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MILAN
PACC PI Meeting Orlando, Florida
January 8, 2003 Akos Ledeczi akos_at_isis.vanderbilt
.edu
http//milan.usc.edu/
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Project Data

• Personnel
• USC
• Viktor K Prasanna, PI
• C S Raghavendra, Co-PI
• A Bakshi, V Mathur, S Mohanty, Y Yu, students
• Vanderbilt
• Akos Ledeczi, PI
• J Davis, E Magyari, S Neema, researchers
• A Agrawal, H Bowen, B Eames, J Farkas, K
  Nagarajan, students
• Dates
• start 02-2001
• Expected end 06-2004

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MILAN Overview
GME 2000
Design Space Exploration Tools
Functional Simulators
High-level Power Estimators
Cycle-Accurate Power Simulators
System Generation and Synthesis Tools
Target System
Model interpreter feeding-back results
Model interpreter driving simulators/tools
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Design Space Exploration
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Design Flow with MILAN
Automated Process
Human-in-the-loop Process
Mixed Process
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Proposed Release Schedule

• MILAN v0.9 Beta
• March 2003
• Has everything demonstrated yesterday
• Documentation
• MILAN v1.0
• September 2003
• Extensibility toolkit (beta version)
• Additional simulators, hardware platforms etc.
• Tutorials
• MILAN v1.1
• June 2004
• Service release
• Additional simulator integration as needed
• Full scale demonstration

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Plans for v0.9

• Prepare documentation
• Prepare code for release
• Bullet-proof interpreters, DESERT, HiPerE
• Code readability (open source)
• Prepare release site (SourceForge?)
• PowerPC simulator integration
• Mambo? Other?
• Port dataflow kernel to RT-Linux/MPI
• Support PACC Space application group

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Plans for v1.0

• Bug fixes (user feedback, beta ? regular release)
• Update documentation, prepare tutorials
• Feedback interpreter framework
• Extensibility Toolkit (MILAN-XTK beta)
• Additional simulator integration (based on
  feedback)
• Enhanced HiPerE for memory and interconnect
  estimation

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Plans for v1.0 contd.

• Enhanced DESERT
• Handle hardware resource design-space
• Support parametric design-space
• Include new solvers (in addition to OBDD)
• Modeling, simulation and performance estimation
  for reconfigurable devices
• New application demonstration
• PCA Radar tracking by MIT LL

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MILAN Workshop at Vanderbilt

• Organized on October 02, 2002
• Attendees
• AFRL Drew Hyatt, Wilmar Sifre
• CECOM Michael Ip, Maulik Shah
• ISI-East Michael Bajura
• Raytheon Ed Wanek, Stanley Yue
• STA Jon Hiller
• Valuable feedback on
• Hardware platforms to support
• Application representations
• Simulators to integrate
• Other extensions to MILAN

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Enhancing MILAN for PARIS

• Application modeling
• capture duty-cycle issues, multi-rate
  applications
• Modeling reconfigurable hardware
• enhance MILAN metamodel for interconnect and
  memory modeling
• Modeling communication in hybrid architectures
• e.g. communication between PowerPC and FPGA in
  Virtex-II Pro
• Augment High-level Performance Estimator (HiPerE)
• support interconnect and memory performance
  modeling
• Simulator integration
• ModelSim and XPower (in progress), SmartPower
  (proposed)
• Hierarchical simulation for FPGAs
• exploit domain specific modeling approach for
  rapid estimation

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Enhancing MILAN for PASTA
Network level simulation

• Modeling enhancements
• collaborative processing
• node sensors, radio, battery
• network communication patterns, topology
• Simulator integration
• Wattch, Intel PXA250, ns-2, SensorSim
• High-level estimator (HiPerE for sensor networks)
• hierarchical simulation Wattchns-2 (preliminary
  version)
• Independent set of modeling paradigms

A modeling and simulation environment for
power-aware design of a multi-node sensor network
Node level simulation
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Recent USC Accomplishments

• Hybrid devices modeling and simulation
  environment
• developed high-level estimator for FPGA based
  kernel designs
• automatic low-level simulation using ModelSim and
  XPower for kernel designs (in progress)
• Distributed sensor network modeling and
  simulation environment
• early prototype (ns-2 as network and Wattch as
  node simulator)
• High-level Performance Estimator (HiPerE )
• enhanced to support multiple processors,
  generates activity report
• Simulator integration
• modified existing MIs to support the enhanced
  metamodel
• updated PowerAnalyzer support for the latest
  release

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Recent Vanderbilt Accomplishments

• Hardware Modeling
• extended hardware application modeling
  capabilities to support VHDL, designed and
  implemented interpreter
• image classification example demonstration
• Design Space Exploration Tool (DESERT)
• completed integration (including feedback to
  MILAN)
• usability enhancements
• Datatype modeling and automatic conversion
• completed integration
• identified new use in design space exploration
• Feedback interpreter framework
• Automatic generation of feedback interpreter code

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Recent Publications

• S. Mohanty and V. K. Prasanna, Rapid
  System-wide Performance Evaluation and
  Optimization for Heterogeneous SoC
  Architectures, IEEE Intl. ASIC/SOC Conference,
  Sep. 2002
• A. Bakshi, J. Ou and V. K. Prasanna, An
  Integrated Design Environment to Evaluate
  Power/Performance Tradeoffs for Sensor Network
  Applications, Sixth Annual Workshop on High
  Performance Embedded Computing (HPEC), Sep. 2002.
• A. Bakshi, J. Ou and V. K. Prasanna, Towards
  Automatic Synthesis of a Class of Sensor Network
  Applications, accepted for publication at Intl.
  Conf. On Compilers, Architectures, and Synthesis
  for Embedded Systems (CASES), Oct. 2002.
• Davis J. Model Integrated Computing A
  Framework for Creating Domain Specific Design
  Environments, The 6th World Multiconference on
  Systems, Cybernetics, and Informatics (SCI),
  Orlando, FL, July, 2002

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Summary

• MILAN v0.9 beta release in March
• open source
• Based on new Generic Modeling Environment
• major new release GME 003
• open source
• Vanderbilt just received an IBM grant to
  integrate GME into Eclipse. This will make MILAN
  available under Eclipse in some form. First MILAN
  version that may be available under Eclipse is
  v1.1