EECSCS 370

1
EECS/CS 370

• A gentle introduction to pipelining
• Lecture 15

2
Note about this lecture

• We have a short lecture today because of a
  scheduled fire drill in the EECS building.
  
• This applies to both sections.
• I will use this time to present an overview of
  pipelining.
  

3
How far have we come?

• Single-cycle processor implementations
• Multi-cycle processor implementations
• Next step improve CPI
• The easiest thing to do is to work on multiple
  instructions at the same time.

4
Working Analogy Whitewater
Whitewater Rafting Whitewater
Kayaking
Timeline is about the same as microprocessors
1970s only a few on the fringe
1980s new adventure for more
1990s Its a business!
5
Rafting in the 1970s

• Want to go rafting in the 70s?
• Find an old army surplus raft
• Find a river
• Put raft in river
• Float to the end
• Get out.
• Number of people on river
• 1
• Resource allocation
• 1 person on river until done.

6
Processors in the 1970s

• Want to execute an instruction?
• Build a processor
• Find an instruction
• Put instruction in processor
• Run instruction
• Get out (for the next instruction)
• Single-cycle datapath the river
• Multi-cycle datapath ???

7
Rafting in the 1980s

• Want to go rafting in the 80s?
• Find a new rafting company
• Pay your fee for boat/guide
• Line up to put rafts in river
• Float in line to the end
• Get out / make guides clean up.
• Number of people on river
• 20 30
• Resource allocation
• 100 people on river in a day.

8
Processors in the 1980s

• Want to execute an instruction?
• Build a processor (multi-cycle)
• Find instructions
• Line up instructions (1, 2, 3)
• Fetch 1
• Decode 1 Fetch 2
• ALU 1 Decode 2 Fetch 3
• This is pipelining instruction execution.
• What happens to the average CPI?

9
Rafting in the 1990s

• Want to go rafting in the 90s?
• Find 1 of 20 rafting companies
• Pay your fee for boat/guide
• Push your way onto river
• Float calmly in line to the end
• Just like the freeway!
• Get out / make guides clean up.
• Number of people on river
• 200 500
• Resource allocation
• Lots of people on river all day.

10
Processors in the 90s

• Execute as many instructions at the same time as
  possible.
  
• Pipelining 12- 20 cycles
• Have multiple pipelines
• Pentium
• 2 pipelines, 5 cycles each 10 instructions
  in flight
  
• Pentium Pro/II/III
• 3 pipelines (kinda), 12 cycles each (kinda)
• Instructions can execute out of their original
  program order

11
Next 5 lectures

• Lecture 16 describe a basic processor pipeline
  datapath
  
• Lecture 17 will further refine pipeline
  execution
  
• Lecture 18 will discuss data hazards in a
  pipeline
  
• Lecture 19 will discuss control hazards in a
  pipeline
  
• Lecture 20 will how exceptions are handled
• After that we will have another exam! (26 Oct 01)