Memory management - PowerPoint PPT Presentation

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Memory management

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Memory management Ingrid Verbauwhede Department of Electrical Engineering University of California Los Angeles Literature F. Catthoor, K. Danckaert, S. Wuytack, N ... – PowerPoint PPT presentation

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Title: Memory management


1
Memory management
  • Ingrid Verbauwhede
  • Department of Electrical Engineering
  • University of California Los Angeles

2
Literature
  1. F. Catthoor, K. Danckaert, S. Wuytack, N. Dutt,
    Code transformations for Data Transfer and
    Storage Exploration Preprocessing in Multimedia
    Processors, IEEE Design Test of Computers,
    May-June 2001, pg. 70-82.
  2. P. Panda, F. Catthoor, N. Dutt, et al, Data and
    memory optimization techniques for embedded
    systems, ACM Transactions on Design Automation
    of Electronic Systems, Vol. 6, no. 2, april 2001,
    pg. 149- 206.
  3. W. Verhaegh, E. Aarts, P. van Gorp, P. Lippens,
    A Two-Stage approach to multi dimensional
    periodic scheduling, IEEE Transactions on CAD,
    Vol. 20, no. 10, October 2001, pg. 1185-1199.

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Important Memory Decisions inEmbedded Systems
  • What is a good memory architecture for an
    application?
  • Total memory requirement
  • Delay due to memory
  • Power dissipation due to memory access
  • Compiler and Synthesis tool (Exploration tools)
    should make informed decisions on
  • Registers and Register files
  • Cache parameters
  • Number and size of memory banks

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Minimizing Register Count
  • Graph Colouring is NP-complete
  • Heuristics (Growing clusters)
  • Polynomial time solution exists for straight
    line code (no branches)
  • Left-edge algorithm
  • Possible to incorporate other factors
  • Interconnect cost annotated as edge-weight

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Intermediate conclusion
  • Memory management is important
  • Two main types
  • background memory optimization
    (multidimensional arrays)
  • foreground memory optimization (scalars)
  • Foreground memory
  • registers graph coloring
  • register files and limited access
  • model of individual read/write operations to SRAM
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