JTC 1SC31WG4SG3

1
JTC 1/SC31/WG4/SG3

• Steve HallidayArtifact DemonstrationApril 27,
  2004Toronto Canada

2
The Issue

• During the work of ISO 18000 we asked that all
  organizations involved with the various parts of
  the standard provide a demonstration of the
  product before FDIS

3
The Result

• Everyone provided demonstrations of hardware
• The demos varied from commercial product to large
  PCBs with many batteries attached

4
The Problem

• Did the demos show that artifacts exist or are
  capable of existing?
• When is the right time to do this?
• What are the Rules to do this in the future?

5
The Group

• A small ad-hoc was tasked with researching the
  issue.
• Steve Halliday
• Michael Guillory
• Ken Laing
• Josef Preishuber-Pfluegl
• Alain Berthon
• Chris Turner
• Bob Williams

6
The Needs

• low risk for the silicon vendor for another
  expensive re-spin
• low risk for the user that the step from the
  artifacts to the final silicon cannot be done. 

7
Discussion Points

• Artifacts need to represent the ability of the
  specification to be realized
• Critical technology elements need to be
  accurately represented
• Assessment of interoperability

8
Possible Solutions

• NP
• Documentation only
• WD
• Before the document is sent to CD ballot,
  demonstrations of the feasibility of the
  technology should be shown.  These can be at ANY
  level.  There is no need for a complete silicon
  demonstration.  The demo can use hardware blocks
  of any type, and individual aspects of the
  air-interface protocol can be shown separately,
  with different pieces of equipment

9
Possible Solutions

• CD
• The demonstration should be complete. It may be a
  simulation of final silicon, but does not have to
  be final silicon. The demonstration should be a
  good representation of the final system and all
  key aspects should be demonstrated.
• FCD
• Close to final silicon should be shown to work,
  with close to final design readers.  Product does
  not have to be in production, but the
  demonstrated versions should be in close to final
  design and form.
• FDIS IS

10
Decisions

• Cannot commit to a final silicon design effort
  until the standard is close to technically
  complete.
• Interim design based on a gate array plus
  external hardware should be permitted to prove a
  design.
• Must remember what we are standardizing e.g. air
  interface not silicon design