Introduction to CMOS VLSI Design Introduction

1
Introduction toCMOS VLSIDesignIntroduction

• Manoel E. de Lima
• David Harris - Harvey Mudd College

2
Introduction

• Integrated circuits many transistors on one
  chip.
• Very Large Scale Integration (VLSI) very many
• Complementary Metal Oxide Semiconductor
• Fast, cheap, low power transistors
• Today How to build your own simple CMOS chip
• CMOS transistors
• Building logic gates from transistors
• Transistor layout and fabrication
• Rest of the course How to build a good CMOS chip

3
WHY VLSI DESIGN?

• Money, technology, civilization

4
Annual Sales

• 1018 transistors manufactured in 2003
• 100 million for every human on the planet

5
Digression Silicon Semiconductors

• Modern electronic chips are built mostly on
  silicon substrates
• Silicon is a Group IV semiconducting material
• crystal lattice covalent bonds hold each atom to
  four neighbors

http//onlineheavytheory.net/silicon.html
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Silicon Lattice

• Transistors are built on a silicon substrate
• Silicon is a Group IV material
• Forms crystal lattice with bonds to four neighbors

7
Dopants

• Silicon is a semiconductor
• Pure silicon has no free carriers and conducts
  poorly
• Adding dopants increases the conductivity
• Group V extra electron (n-type)
• Group III missing electron, called hole (p-type)

8
p-n Junctions

• A junction between p-type and n-type
  semiconductor forms a diode.
• Current flows only in one direction

9
A Brief History Invention of the Transistor

• Vacuum tubes ruled in first half of 20th century
  Large, expensive, power-hungry, unreliable
• 1947 first point contact transistor (3 terminal
  devices)
• Shockley, Bardeen and Brattain at Bell Labs

10

A Brief History, contd..

• 1958 First integrated circuit
• Flip-flop using two transistors
• Built by Jack Kilby (Nobel Laureate) at Texas
  Instruments
• Robert Noyce (Fairchild) is also considered as a
  co-inventor

Kilbys IC
smithsonianchips.si.edu/ augarten/
11

A Brief History, contd.

• First Planer IC built in 1961
• 2003
• Intel Pentium 4 ?processor (55 million
  transistors)
• 512 Mbit DRAM (gt 0.5 billion transistors)
• 53 compound annual growth rate over 45 years
• No other technology has grown so fast so long
• Driven by miniaturization of transistors
• Smaller is cheaper, faster, lower in power!
• Revolutionary effects on society

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MOS Integrated Circuits

• 1970s processes usually had only nMOS
  transistors
• Inexpensive, but consume power while idle
• 1980s-present CMOS processes for low idle power

Intel 1101 256-bit SRAM
Intel 4004 4-bit ?Proc
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Moores Law

• 1965 Gordon Moore plotted transistor on each
  chip
• Fit straight line on semilog scale
• Transistor counts have doubled every 26 months

Integration Levels SSI 10 gates MSI 1000
gates LSI 10,000 gates VLSI gt 10k gates
http//www.intel.com/technology/silicon/mooreslaw/
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Transistor Types

• Bipolar transistors
• npn or pnp silicon structure
• Small current into very thin base layer controls
  large currents between emitter and collector
• Base currents limit integration density
• Metal Oxide Semiconductor Field Effect
  Transistors
• nMOS and pMOS MOSFETS
• Voltage applied to insulated gate controls
  current between source and drain
• Low power allows very high integration
• First patent in the 20s in USA and Germany
• Not widely used until the 60s or 70s

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nMOS Transistor

• Four terminals gate, source, drain, body
• Gate oxide body stack looks like a capacitor
• Gate and body are conductors
• SiO2 (oxide) is a very good insulator
• Called metal oxide semiconductor (MOS)
  capacitor
• Even though gate is
• no longer made of metal

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nMOS Operation

• Body is commonly tied to ground (0 V)
• When the gate is at a low voltage
• P-type body is at low voltage
• Source-body and drain-body diodes are OFF
• No current flows, transistor is OFF

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nMOS Operation Cont.

• When the gate is at a high voltage
• Positive charge on gate of MOS capacitor
• Negative charge attracted to body
• Inverts a channel under gate to n-type
• Now current can flow through n-type silicon from
  source through channel to drain, transistor is ON

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pMOS Transistor

• Similar, but doping and voltages reversed
• Body tied to high voltage (VDD)
• Gate low transistor ON
• Gate high transistor OFF
• Bubble indicates inverted behavior

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Power Supply Voltage

• GND 0 V
• In 1980s, VDD 5V
• VDD has decreased in modern processes
• High VDD would damage modern tiny transistors
• Lower VDD saves power
• VDD 3.3, 2.5, 1.8, 1.5, 1.2, 1.0,

20
Transistors as Switches

• We can view MOS transistors as electrically
  controlled switches
• Voltage at gate controls path from source to drain

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Transistors
Level Symbol Switch Conditions
Strong 1 1 P-switch gate0, sourceVdd
Weak 1 1 N-switch gate1, sourceVdd
Strong 0 0 N-switch gate1, sourceVss
Weak 0 0 P-switch gate0, sourceVss
High impedance Z N-switch gate0, or P-switch gate1
Input 0
Output poor 0
Input 0
Output Good 0
Input 1
Output good 1
Input 1
Output poor 1
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Input 0
Output poor 0
Input 0
Output Good 0
Input 1
Output good 1
Input 1
Output poor 1
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CMOS Inverter
A Y
0
1
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CMOS Inverter
A Y
0
1 0
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CMOS Inverter
A Y
0 1
1 0
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CMOS Inverter
1- Vin Vdd Análise do circuito
Vdd5V
Roff
Ids
Cálculo de Vout Vdd Ids(RoffRon) gt Vdd
Ids.RoffIds.Ron gt Vdd Ids.RoffVout
gt Vout Vdd-Ids.Roff 0V
Ron
Vout
Ron lt 1 Kohms Roff 1010Kohms Ids é pequeno,
mas Roff é bastante grande
0V
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CMOS Inverter

• Note que Vh 5V, VL 0V, e que Ids 0A.
• Isto significa que não existe praticamente
  dissipação de potência.

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CMOS Inverter
Ron ? 1 K?
5V
5V
Transistor não conduz
R
In
Out
Vih1
GND
GND
Capacitor carregado (1)
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CMOS Inverter
2- Vin 0V Análise do circuito
Vdd5V
Ron
Ids
Roff
Vout
Ron lt 1 Kohms Roff 1010Kohms Ids é muito
pequeno
0V
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CMOS Inverter

• Note que Vh 5V, VL 0V, e que Ids 0A.
• Isto significa que não existe praticamente
  dissipação de potência.

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CMOS Inverter
Ron ? 1 K?
5V
5V
Transistor conduz
R
In
Out
Iih
Ioh
Vil0
GND
GND
Capacitor
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CMOS NAND Gate
A B Y
0 0
0 1
1 0
1 1
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CMOS NAND Gate
A B Y
0 0 1
0 1
1 0
1 1
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CMOS NAND Gate
A B Y
0 0 1
0 1 1
1 0
1 1
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CMOS NAND Gate
A B Y
0 0 1
0 1 1
1 0 1
1 1
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CMOS NAND Gate
A B Y
0 0 1
0 1 1
1 0 1
1 1 0
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Lógica Combinacional

• Porta NAND

Vcc (1)
Porta NAND de n-entradas
Vcc
(AB)
Vcc
P
P
n
B
C
A
saída
Saída
Saída
A B C n
Dual Lógico
N
A B
(A B)
N
A
B
GND
GND (0)
GND
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CMOS NOR Gate
A B Y
0 0 1
0 1 0
1 0 0
1 1 0
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Lógica Combinacional

• Porta NOR

Vcc (1)
P
Vcc
(A B)
A B
P
Dual Lógico
saída
saída
N
N
A
B
GND
(AB)
GND (0)
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3-input NAND Gate

• Y pulls low if ALL inputs are 1
• Y pulls high if ANY input is 0

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Summary

• MOS Transistors are stack of gate, oxide, silicon
• Can be viewed as electrically controlled switches
• Build logic gates out of switches