Practical, Reliable And CostEfficient Floatingpoint to Fixedpoint Conversion

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Practical, Reliable And Cost-Efficient
Floating-point to Fixed-point Conversion
PREFFIX
Changchun Shi Advised by Prof. Bob
Brodersen Winter Retreat, 2002 Berkeley Wireless
Research Center
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Motivation (Detailed Version)
Wireless Comm. Alg. In Floating-point Arithmetic
a ? b

• Time consuming
• Error-prone

Need a systematic tool for flpt-fxpt conversion
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Past Techniques FRIDGE
Avoid overflow ? WInt (same for all other
techniques)
Fixed-point pRogrammIng DesiGn Environment See,
e.g.,H. Keding, M. Willems, M. Coors, and H.
Meyr, FRIDGE a fixed-point design and
simulation environment Design, Automation and
Test in Europe, 1998., Proceedings , pp. 429
435,1998
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Past Techniques Guided
Flpt input
?

Fxpt input
?

• due to input Q.N.
• ? WFr

• Unjustified pre-assign
• Conservative
• Need iteration

See, e.g., R. Cmar, L. Rijnders, P. Schaumont, S.
Vernalde, I. Bolsens, A methodology and design
environment for DSP ASIC fixed point refinement,
Design, Automation and Test in Europe Conference
and Exhibition 1999. Proceedings , 1999 Page(s)
271 276
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Past Techniques Robust Adhoc
Fxpt System As Black-box
System specs
bit-true sim.
Hardware-cost
Fxpt datatype
Ad-hoc search

• Long bit-true simulation
• Large number of iterations
• Impractical for large systems

See, e.g., Wonyong Sung, and Ki-Il Kum,
Simulation-based word-length optimization method
for fixed-point digital signal processing
systems, IEEE Trans. Signal Processing, vol. 43,
no. 12, Dec. 1995.
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Proposed Approach
Goal practical, reliable and cost-efficient
flpt-fxpt
Our approach (original)
Summary of the problems

• Keep optimization in mind
• Get closed-form functions
• Solid theory
• Fast and bounded sim.
• Strategies on large sys.
• Automate all processes
• Avoid loop in design flow

• Unjustified datatypes
• Long simulations
• Black-box
• Adhoc search
• Error-prone
• Conservative
• Impractical for large sys.

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Problem Formulation Optimization
Minimize hardware-cost f(WInt,1, WFr,1
WInt,2, WFr,2 o-q-modes) Subject to specs
Sj(WInt,1, WFr,1 WInt,2, WFr,2
o-q-modes) lt 0, ? j Feasibility ? N ? Z
, s.t. Sj(N, N any modes) lt 0, ? j Stopping
criteria f lt (1 a) fopt where a gt 0.
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Hardware Cost
Quadratic hardware-cost model
e.g. a multiplier
or
From N. Zhang et al, 2000

• Large system decomposed into modules
• Script can automate H.W.-cost into its
  analytical form

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Bit-True Simulation Monte-Carlo
AWGN
Decision
WFr
Bern. seq.
ADC
Slicer

• Monte-Carlo simulations have
• 1. Sample size problem
• Statistical Model
• Hypothesis Testing, Or
• Confidence Interval (Dual)
• 2. Uncertainty to decision

BER
WFr
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Examine The Specs For Comm. Sys.

• Standard sys. specs
• Combating with physical noise

Our insight
Fxpt sys. differs little from flpt sys.
Differ in terms of
How little?
Alt. spec change on sys. specs
D(s.s.) ltlt s.s.(flpt)
Output mean square error spec MSE( fxpt sys.
output - flpt sys. output ) A lt 0
A ltlt physical noise power
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Perturbation Theory
Alternative spec Quantization noise source i at
time Tj introduces error input ei,Tj then
where un-correlation facts have been used.
Apply to ANY digital system
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Perturbation Theory (Detailed Version)
Alternative spec Let ei,Tj be error input from
q-noise source i at time Tj then
where un-correlation facts have been used.
Apply to ANY digital system ( e.g. w/ mux,
upsamplers )
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Perturbation Theory On MSE
Output MSE specs
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Perturbation Theory On MSE (Detailed)
Output MSE Specs
where un-correlation facts are used, and
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LMS Demonstration
Perturbation on Alt. Spec
MSE Spec
Log2(spec change)
Log2(MSE change)
WFr , b
WFr , b

• Perturbation theory works on non-linear sys.
• Est. MSE-spec is gt104? more efficient than
  alt.-spec!

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Robustness of MSE Spec
Output SNR (dB)
WFr
Fxpt perturbation ltlt physical noise ? 3 or 4 dB
estimation error on MSE is fine!
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Structure of LMS
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Additional Info Of LMS
LMS convergence Characteristics
MSE estimation
Error power
Output (flpt fxpt)
Sample time
Sample time
MSE estimation is robust even in the transient
time
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Check With LTI DSP Theory
Transfer function method

• Agree with perturbation theory!
• Additional info for LTI

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Check With MIMO-LTI Systems
Transfer function method
w/

• Agree with perturbation theory!
• Additional info for LTI

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LTI Demo 1 Biquad
Matches within 1 dB throughout the spectrum
Monte-Carlo w/ conf. intvl.
Theory
Frequency
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LTI Demo 2 FFT
Output Q.N. Power
Again, matches within tolerance!
FFT Channels
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Transfer Function Method
mi mj 10-3
WFr,i 10, round-off
Monte-Carlo
Monte-Carlo
MSE(mi )
MSE(mi , mj)
MSE( WFr,i )
?10-6
?2-210
Bii
Bii Bjj 2 Bij
Ci
Bii , Bij
of Monte-Carlo simulations dim(B)2 dim(C)
Future work more robust data-fitting
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Biquad Revisited
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Restatement of Optimization
Stopping criteria f lt (1 a) fopt where a gt 0.
Future work systematic method, with engineering
decisions
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Hierarchical Design

• Decompose hardware-cost into sum of block
  h.w.-costs
• Decompose spec. into independent block specs

Blose-wise optimization


kth-block

• Vast simplification
• Exponential relationship may justify the loss of
  performance

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Fast Simulation Using FPGA
MSE is efficient, but in case
Use FPGA to speed up the estimation!
large WL fxpt sys.
MSE
large WL fxpt sys. quant, const, mux
Design in Simulink
Matlab Workspace
FPGA board

• Fast mapping?
• or control logic on board
• Large WL fxpt sys. fits on FPGA?

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Our Design Environment Simulink
Choose Simulink since it

• Links to other efforts in BWRC
• Fxpt datatype displayed, controllable and
  observable
• Block-diagram based
• ? alg./arch./ H.W.-designer in common ground
• Integrated with Matlab
• Bit-cycle true
• Can do all the past techniques, and much more
• Well supported

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Limitations of Simulink

• Slower than C/Matlab
• Additional info. (e.g. position) unnecessary for
  PREFFIX
• Not all primitive Simulink cell chip module in
  functionality
• More complicated hardware effect not modeled

However, none of above imposes severe problems.
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Design Flow Graph
(hierarchical) Flpt sys in Simulink
H.W.-cost Info
PREFFIX
Wint , o-modes
WFr , q-modes
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Losses In Modeling
A piece of VLSI chip
The laws of nature

• Losses in this inter-level modeling should be
  studied
• FWL effect is relatively immune!

Complex prob. wave function
Classical Quantum Mech.
Semi-conductor consists of electrons and atoms
Solid-state E.M. physics
Layout
Trans. function model on electrical signals
Electronic devices w/ interconnect
Circuits
Circuit characterization
Fxpt system w/ arch.
Binary arithmetic
Flpt system w/ arch
Pure analysis or statistics
Structural description
Behavioral Description
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Status Future Work

• Defined the problem in its closed form
• Provided a promising design flow
• Learn automation method of Simulink in great
  depth
• Working on hardware-cost function

• Obtain more accurate H.W.-cost model (by Sum,
  02)
• Pre-program optimization method (by Fall, 02)
• Complete automation and PREFFIX ready (next
  year)
• PREFFIX actual sys. MCMA, UWB (along the way)

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Supported Research Efforts
Matlab Alg.
MCMA
Simulink flpt.
Arch.
PREFFIX
Simulink fxpt.
Arch.
SSHAFT
BEE
FPGA
ASIC chip
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Conclusion

• Contributions
• In-depth problem characterization
• Understand how to bridge the gaps between design
  levels
• Provided insight for theorists

• Contributions to have
• Practical, Robust, and cost-Efficient Flpt-FIXpt
  conversion (PREFFIX)
• Provide better implementations on real systems

• Possible extension
• Architectural exploration

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Thesis Content
Chapter 1. Introduction past techniques Chapter
2. Problem statement in optimization
scenario Chapter 3. Specifications perturbation
theory Chapter 4. Closed-form specs and
hardware-cost function Chapter 5. Optimization,
fast simulation and hierarchical design Chapter
6. Complete automation for PREFFIX Chapter 7.
Apply to real systems Chapter 8. Conclusion with
possible future work