RF and mmWave Research

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RF and mm-Wave Research

• Ali Niknejad, Robert Brodersen,
• Jan Rabaey, Robert Meyer
• University of California at Berkeley

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Presentation Outline

• Research Focus
• 60 GHz Update
• Universal Radio
• Ultra Wideband LNA
• Summary

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Research Focus Areas
Universal Radio
60 GHz WLAN
BSIM
Dynamic Radio Multistandard Operability Broad/Mult
i band Voice/Data Short/Long Range
Gb/s Data Rates Multi-Antenna Architecture Sub-100
nm CMOS
Anti-Collision Radar
WLAN at 17/24 GHz
UWB
Cognizant Radio
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60 GHz Transceiver Update

• Chinh Doan, Sohrab Emami,
• Brian Limketkai, David Sobel,
• Patrick McElwee, Mounir Bohsali,
• Sayf Alalusi, Hanching Fuh

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FCC Unlicensed Spectrum at 60 GHz

• A key motivation for this project there is 5 GHz
  of unlicensed bandwidth available at 60 GHz, with
  numerous, obvious advantages and applications

• But path loss is high at 60 GHz due to
  propagation loss and small capture area of an
  antenna element
• Antenna capture area 100 x smaller compared to 5
  GHz system

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60 GHz Wireless LAN System
10-100 m

• Objective Enable a fully-integrated low-cost
  Gb/s data communication using 60 GHz band.
• Approach Employ emerging, standard CMOS and
  SiGe technology for the radio building blocks.
  Exploit antenna array for improved gain and
  resilience.

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Applications and Impact

• Our Goal Wireless LAN networks operating at
  data rates 100 X faster than today (1 Gb/s)
• This research will also enable CMOS and SiGe
  technology as a low-cost small footprint
  alternative to many microwave and mm-wave systems
  (100 X cost reduction)
• Examples
• Anti-collision radar for automobiles
• Short-range high-throughput data communication
  (wireless USB)
• Point-to-point Gb/s wireless data network links
• Advance state of the art in modeling and
  simulation of CMOS and SiGe microwave and mm-wave
  systems

http//bwrc.eecs.berkeley.edu/Research/RF/ogre_pro
ject/
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Challenges and Solution

• Major Challenges
• High path loss at 60 GHz (relative to 5 GHz)
• Silicon substrate is lossy high Q passive
  elements difficult to realize
• CMOS building blocks at 60 GHz
• Need new design methodology for CMOS mm-wave
• Low power baseband architecture for Gbps
  communication
• Solution
• CMOS technology is inexpensive and constantly
  shrinking and operating at higher speeds
  multiple transceivers can be integrated in a
  single chip
• Antenna elements are small enough to allow
  integration into package
• Beam forming can improve antenna gain, spatial
  diversity offers resilience to multi-path fading
• Due to spatial power combining, individual PAs
  need to deliver only 50 mW

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Performance Goals
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CMOS Active and Passive Devices

• Sohrab Emami
• Chinh Doan

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mm-Wave BSIM Modeling

• Compact model with extrinsic parasitics
• DC I-V curve matching
• Small-signal S-params fitting
• Large-signal verification
• Challenges
• Starting with a sample which is between typical
  and fast
• Millimeter-wave large-signal measurements
• Noise
• 3-terminal modeling

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Model Extraction Small-Signal

• Extensive on-wafer S-parameter measurement to 65
  GHz over a wide bias range
• Parasitic component values extracted using a
  hybrid optimization algorithm in Agilent IC-CAP.
• The broadband accuracy of the model verifies that
  using lumped parasitics is suitable well into the
  mm-wave region.

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Transistor Design and Modeling

• Transistor layout
• Multi-fingered transistors
• Close substrate contacts
• Minimize source/drain resistances
• CPW input/output
• Transistor modeling
• Lumped small-signal models
• Broadband accuracy up to 65 GHz

MSG _at_ 60 GHz 6.3 dB U _at_ 60 GHz 8.6 dB
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Large-Signal Verification

• Harmonics power measurement
• Class AB operation
• Large-Signal amplification at 60 GHz

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Transmission Lines

• Transmission line types
• CPW high inductance, requires bridges
• Microstrip shields from substrate, low
  inductance
• Capable of realizing precise small reactances
• Inherently scalable, broadband models

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ADS and HFSS Passive Models

• ADS Passive Models
• Simple electrical models
• Scalable (in length)
• Fast simulation time
• Allows use of optimizers
• HFSS Passive Models
• Accurate broadband prediction of reactance and
  loss
• Comparison of arbitrary structures
• Visualization of EM fields

Both models provide good broadband accuracy!
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60-GHz Amplifier Design

• 3-stage cascode amplifier design
• Cascode transistors improve isolation, stability
• Input/output matching networks designed to match
  50 O
• Broadband design to account for process variation
• Designed using only measured components

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60-GHz Amplifier Simulation

• Passband gain 11 dB
• Input/output return loss gt 20 dB
• Power dissipation 54 mW

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Performance of Single-Gate Mixer
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60-GHz LNA and Dual-Gate Mixer
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40 GHz 21 Injection-locked divider

• Oscillators at 60 GHz have already been
  demonstrated at ISSCC
• Key challenge is to build a VCO in a synthesizer
  loop
• One alternative is a LO doubler to ease divider
  power requirement
• Another option is a injenction locked system
• Resonator-based frequency divider
• 20 GHz oscillator core
• 2nd harmonic in core locks onto injected signal

Injected signal
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Injection-locked Divider Layout

• Pierce oscillator topology
• CPW used for inductances
• 800 MHz locking range at 3 dBm injected signal
  power

Output buffer
Injected Signal path
Oscillator core
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20 GHz Fully Integrated CMOS PA

• Multistage matching network
• Power out 100 mW
• Drain efficiency 20
• Power gain hard to simulate

• Power supply 1.5V
• Matching network IL 2.73 dB
• Qind 10, Qcap 30

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20 GHz CMOS PA Layout
Coplanar Inductors
Gate Tuning Inductor
Output GSG
Input GSG
MIM Caps
Power NFET Cascode
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Milestones and Progress Report

• Present Status
• Measurement facilities at BWRC upgraded to allow
  active/passive measurements up to 60 GHz
• CMOS test chips measured and analyzed
• Optimal layout of CMOS transistors verified
• 30 GHz 7HP SiGe Receiver (taped out in 6/03)
• 60 GHz LNA/Mixer Designed and Fabricated (tape
  out in 11/03, 12/03)
• ISSCC Invited Talk on 60 GHz CMOS
• Future
• Measure Nov/Dec CMOS Circuits
• Design and fabricate 60 GHz CMOS front-end blocks
• Measure 30 GHz SiGe blocks and receiver
• Demonstrate 20 GHz active antenna array and CMOS
  PA

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Universal Radio

• Axel Berny, Gang Liu
• Zhiming Deng, Nuntachai Poobuapheun

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Challenges for RF Radio Design

• Simultaneous need for low noise and good
  linearity
• Receive a weak signal in the presence of strong
  interferer
• Strong signal exercises amp linearity
• Reciprocal mixing causes VCO noise to limit
  performance

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High External Component Count

• Current trends in academia and industry have
  reduced component count at RF and IF
• The Low-IF, Direct-Conversion, and Wideband IF
  radio architectures eliminate (reduce) external
  IF filters
• Systems still heavily dependent on external
  components on the front end SAW filters,
  switches, directional couplers, matching
  networks, pin diode, diplexers
• Many of these components are expensive (high Q)
  and narrowband

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Multiplicity of Standards

• Cellular voice GSM, CDMA, W-CDMA, CDMA-2000,
  AMPS, TDMA
• Same standard over multiple frequency bands (4-5
  GSM bands exist today)
• Data 802.11b, 802.11a, Bluetooth, 3G
• A typical handheld computer or laptop should be
  compatible with all of the above standards
• Today a typical cellular receiver has 3-4 radio
  front-ends this approach does not scale!

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Dynamic Operation

• High power consumption due to simultaneous
  requirement of high linearity in RF front-end and
  low noise operation
• The conflicting requirements occur since the
  linearity of the RF front-end is exercised by a
  strong interferer while trying to detect a weak
  signal

• The worst case scenario is a rare event. Dont
  be pessimistic!
• A dynamic transceiver can schedule gain/power of
  the front-end for optimal performance

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Universal Dynamic Radio

• High dynamic range broadband front end and high
  speed ADC
• Eliminate high-Q front-end filtering, employ
  integrated MEMS filtering instead
• Design parallel or broadband amplifiers to cover
  major bands around 1 GHz, 2 GHz, 5 GHz, etc.
• Require dynamic operation to reduce power
• Employ broadband matching, filtering, and
  amplification
• (e.g. 500 MHz 3 GHz)

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Broadband VCO for Universal Frquency Synthesizer

• Axel Berny
• Zhiming Deng

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Universal Receiver Front End

• Goals
• A multi-standard dynamically operated LNA and
  Mixer
• A low-power fully-integrated multi-standard
  Frequency Synthesizer
• A wideband low-phase-noise VCO
• Proposed Specifications
• Frequency range 800MHz 2.5GHz (cover all the
  cellular phone standards and 802.11b standard)
• LNA S21 15dB, NF lt 4dB
• Reference frequency 20MHz
• Frequency resolution 2.5kHz
• Phase noise lt -116dBc/Hz at 600kHz
• Settling time lt 150us

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Broadband LNA

• Two Stage input matching Architecture

• Two-Stage input matching improves the bandwidth
  by a factor of 2-3.
• Use cascode devices to improve isolation.
• Quality of passive devices determine the noise
  figure of the input stage.

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Preliminary Results-LNA
- At 15mA bias current, the LNA can operate from
0.7-2.5 GHz with acceptable performance. -
At 1.9 GHz, bias current can be adjusted to
control the power consumption and performance of
the LNA.
15mA
1.9 GHz
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Synthesizer PLL Simulink Model
Type-I, Order-2, Sigma-Delta Fractional-N PLL
Model Simulation Result Frequency Settling
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Broadband VCO with Switch Caps
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Broadband VCO Layout

• A 1.8 GHz LC VCO
• 1.3 GHz Tuning Range
• Mixed-signal Amplitude Calibration
• 0.18µm CMOS
• phase noise of 104.7dBc/Hz at a 100kHz
• 3.2mA from a 1.5V supply

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Amplitude Calibration Loop

• Analog amplitude feedback introduces noise
• Digital feedback loop can be run once at start-up
  

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Measured Tuning Range
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Measured Phase Noise
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Calibration Loop in Action
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Importance of Calibration

• Phase noise at 100kHz offset from the carrier and
  core power dissipation vs. frequency, for
  calibrated and uncalibrated VCO.

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TX Class A/F Dual Mode PA

• Design a power amplifier which meets requirements
  called by the next generation wireless
  communication standards while providing backward
  compatibility with existing network
• Integration fully integrated without any off
  chip components
• Long talk time maintain high efficiency over
  entire output range
• High data rate amplitude modulation requires
  high linearity

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Distributive Active Transformer

• Power combining major challenge of PA design
• Caltech work has shown that DAT is promising
  candidate for fully integrated power combining
  and matching
• Low loss transmission lines form 11 transformers
• Distributed nature allows power/efficiency
  control

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3-10 GHz UWB LNA

• Andrea Bevilacqua and Ali Niknejad
• to be presented at ISSCC 04

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UWB RF Radio Architecture

• System architecture for next generation UWB
  system hotly debated
• Regardless of choice of architecture, there is a
  need to amplify the signals at the front-end

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Broadband LNA Design

• Distributed amps are easy solution but consume
  too much power
• Absorb transistor parasitics into 3-section
  Chebychev filter
• Shunt peaking helps extend bandwidth

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LNA Layout
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Reduce Parasitics in TW Process
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Measured Small Signal Performance

• Input/output matching better than -10 dB over
  3-10 GHz band
• Power gain of 10 dB with good reverse isolation
• TW connection helps gain at HF at expense of
  isolation

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Variation Over 6 Measured Parts
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Measured Inductor Quality Factor
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Noise Measurement Setup

• Measured de-embedded noise figure as low as 4 dB
• Attenuation of input filter adds dB-for-dB
• Average NF in band 5.5 dB
• TW connection has slightly higher noise
• NF matches simulations when induced gate noise is
  included

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Measured Large Signal Performance

• IIP3 measured at -6.7 dBm
• IIP2 measured at 0 dBm

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Comparison to Other Broadband Amps
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Conclusion

• CMOS technology has been demonstrated to be
  effective for microwave and mm-wave applications
• Modeling layout-dependent parasitics of integral
  importance at mm-wave frequencies
• Enhanced lumped models based on BSIM IV-CV core
  capable of predicting large signal and small
  signal behavior at 60 GHz
• The ingredients for a 60 GHz TX/RX at hand. The
  low power implementation of an LNA, mixer, VCO,
  and PA are next challenge
• Universal radio can simplify radio design and
  reduce time to market
• Dynamic LNA/mixer/VCO operation allows power
  savings with acceptable reduction of performance
• Broadband LNA topology good alternative to
  distributed amplifier design