On Complexity of Internal and External Equivalence Checking

1
On Complexity of Internal and External
Equivalence Checking
Eugene Goldberg (Cadence, USA), Kanupriya Gulati
(Texas AM University, USA)
DSD 2007, Lübeck, Germany
2
Summary

• Introduction
• external and internal equivalence checking (EC)
• do we make any progress?
• Logic synthesis and internal equivalence checking
  of circuits with a common specification
• case when toggle equivalence is preserved
• case when toggle implication is preserved
• Complexity of external equivalence checking
• case when toggle equivalence is preserved
• case when toggle implication is preserved
• Experimental results and conclusion

3
Combinational EC
Sequential EC reduces to combinational EC (if
registers stay untouched).
In this paper we consider EC of large
combinational circuits. Informally, a
combinational circuit is large if does not have a
small BDD.
Usually, a combinational circuit does not have a
small BDD if this circuit has a large width. A
multiplier is a classical example of a wide
circuit.
4
External and internal EC
Given circuits N1 and N2, the equivalence
checking problem (EC) is to prove that N1 and N2
are functionally equivalent or to find a
counterexample.
Informally, EC is external if no information
about the origin of N1 and N2 is given.
EC is internal if we know how N2 is obtained
from N1 (for example, by a synthesis
transformation).
5
Is any progress of external EC possible?
The most promising direction for external EC of
large circuits is to exploit their structural
similarity (e.g. find functionally equivalent
points and use them as cut points).
A natural question is whether one can always
efficiently check N1 and N2 for functional
equivalence (externally) if they are structurally
similar.
In this paper, we argue that most likely the
answer to this question is no. We describe a
class of circuits that are very similar (they
have a common specification) but they can not be
efficiently checked externally.
On the other hand, if a common specification of
N1 and N2 is known, they can be efficiently
checked for equivalence.
6
What does it mean?
External EC of large combinational circuits is
possible only if N1 and N2 are very similar
(logic synthesis is weak).
In general, the synthesis procedure used to
produce N2 from N1 has to generate extra
information that would allow efficient (internal)
EC of N1 and N2.
We show how this works for logic synthesis
preserving common specification. On the one hand,
such synthesis can explore very large space and
so enjoys great flexibility.
On the other hand, by providing the common
specification of N1 and N2 one makes their
(internal) EC efficient.
7
Summary

• Introduction
• external and internal equivalence checking (EC)
• do we make any progress?
• Logic synthesis and internal equivalence checking
  of circuits with a common specification
• case when toggle equivalence is preserved
• case when toggle implication is preserved
• Complexity of external equivalence checking
• case when toggle equivalence is preserved
• case when toggle implication is preserved
• Experimental results and conclusion

8
Example of Logic Synthesis preserving Toggle
Equivalence (LS_TE)
square(x) lt 100 ? abs(x) lt 10
z
z
N2
y lt 100
y lt 10
N2

y1
y2n

y1
yn
N1
N1
square(x)
abs(x)

Circuit N

Circuit N
x1
xn
x1
xn
Subcircuit N1 is toggle equivalent to N1.
Subcircuit N2 is toggle equivalent to N2 (under
allowable input assignments).
9
General formulation of LS_TE
Given a single-output combinational circuit N
with specification N1,..,Nk LS_TE is to produce
a new circuit N replace each Ni with an
optimized toggle equivalent Ni.
Multi-output subcircuits Ni and Ni are toggle
equivalent if Ni(p? ) ? Ni(p? ) ? Ni(p? ) ?
Ni (p? ).
Single-output subcircuits Toggle equivalence ?
functional equivalence (modulo negation).
Definition of toggle equivalence can be extended
to the case when Ni and Ni have different input
variables but there is a one-to-one mapping
between allowed input assignments.
10
Toggle implication
Denote Ni and Ni by M and M respectively
Toggle implication (denoted M ? M ) M(p? ) ?
M(p? ) ? M(p? ) ? M(p? ).
M and M are toggle equivalent iff M ? M and
M ? M
11
Checking toggle implication
M is a copy of M
M is a copy of M

z1
zm
M
M ? M holds iff S(M,M) is unsatisfiable.

x1
xn
S(M,M) SAT(M) ? SAT(M) ?
SAT(M) ? SAT(M) ? (Z ? Z) ?
(Z Z)

z1
zp

z1
zm
M
M
M and M are toggle equivalent iff S(M,M) and
S(M,M) are unsatisfiable.


x1
xn
x1
xn
12
EC of circuits produced by LS_TE
Let N and N be single-output circuits N and N
with specifications N1,..,Nk and N1,..,Nk.
z
z
y lt 100
y lt 10
N2
N2
y1
yn

y1
y2n

N1
N1
square(x)
abs(x)

• Process pairs Ni,Ni in topological order (from
  inputs to outputs).
• Check if Ni,Ni are toggle equivalent.

N
N


x1
xn
x1
xn

• Produce the output relation Dout(Ni,Ni,Dinp) by
  the existential quantification operation.
• If Dout(Nk,Nk) is the equivalence relation,
  then N and N are equivalent.

13
Complexity of LS_TE and EC_TE
Both LS_TE and EC_TE have the same complexity.
LS_TE and EC_TE are linear in the number of
subcircuits in Spec(N) and Spec(N) (Here Spec(N)
N1,,Nk)
They are exponential in the granularity of
specifications Spec(N) and Spec(N). (Here
granularity is the size of the largest subcircuit
Ni,Ni.)
From a practical point of view to make LS_TE and
EC_TE efficient one should keep the number of
outputs in subcircuits Ni,Ni small, (say, less
than 10 outputs).
Note that the number of toggle equivalent
functions is huge. For a 5-output function this
number is approximately (25)! i.e. 32!
14
Logic Synthesis Preserving Toggle Implication
(LS_TI)
square(x) lt 100 ? abs(x) lt 10
Given a single-output circuit N and Spec(N),
N1,..,Nk,
z
z
a) replace every Ni with Ni such Ni ? Ni,
i1,..,k-1 and num_of_outputs(Ni) ? C b) Nk ?
Nk and Nk ? Nk
y lt 100
y lt 10
N2
N2
y1
yn

y1
y2n

N1
N1
sq_mod(x)
abs(x)
N
N


x1
xn
x1
xn
LS_TI,EQ_TI have the same complexity as
LS_TE,EQ_TE.
square(x), x?5
sq_mod(x)
sq_mod(5)sq_mod(6)
15
Summary

• Introduction
• external and internal equivalence checking (EC)
• do we make any progress?
• Logic synthesis and internal equivalence checking
  of circuits with a common specification
• case when toggle equivalence is preserved
• case when toggle implication is preserved
• Complexity of external equivalence checking
• case when toggle equivalence is preserved
• case when toggle implication is preserved
• Experimental results and conclusion

16
Complexity of external EC for circuits produced
by LS_TE
Let N and N be produced by LS_TE. Let
Spec(N)N1,..,Nk and Spec(N) N1,..,Nk.
To prove N and N equivalent one needs to find
Spec(N) and Spec(N). Let Out be the maximum
number of outputs in Ni,Ni. The complexity of
finding Spec(N) and Spec(N) is proportional to
NOut ? NOut. (unless some miracle happens
like PNP)
The reason why current equivalence checkers are
successful is because they deal with the case
Out 1.
Incrementing Out by 1 dramatically increases the
complexity of external EC. So the progress is
here questionable to say the least.
17
Complexity of external EC for circuits produced
by LS_TI
External EC of circuits produced by LS_TI is even
harder than for LS_TE. The reason is the huge
number of false negatives.
Let M be a subcircuit of N. Let M and be a
subcircuit of N.


M
M
If M ? M, then M ? Mcut where Mcut is a
subcircuit of M consisting of the gates between
the inputs and the cut.
cut


18
Experimental results (generation of toggle
equivalent circuits)
19
Experimental results (generation of two-stage
circuits)
20
Conclusions
We introduce logic synthesis procedures (LS_TE
and LS_TI) that can produce circuits whose
external equivalence checking most likely can not
be done efficiently.
On the other hand, the internal equivalent
checking of such circuits can be done efficiently.
We give some preliminary experimental results
showing the promise of LS_TE and LS_TI
A natural conclusion is that if a logic synthesis
procedure is powerful enough, it has to provide
some information (like common specification) that
will make equivalence checking efficient.