ECE 4713 Computer Architecture - PowerPoint PPT Presentation

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ECE 4713 Computer Architecture

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Rising Edge Triggered. Datapath Design. Finite State Machine ... ( BLT )? ( BGT )? ( SW )? ( LW )? RegDst=1. RegWrite. MemtoReg=0. PCWrite. PCSource=10 ( BNE ) ... – PowerPoint PPT presentation

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Title: ECE 4713 Computer Architecture


1
ECE 4713 Computer Architecture
  • Team I
  • JAM-N Processor

2
Overview
  • Team Members
  • Mike Wilson
  • Aaron Plunkett
  • Joseph Cunningham
  • Processor
  • 15 Instruction
  • Rising Edge Triggered

3
Datapath Design
4
Finite State Machine
ALUSrcA0 ALUSrcB11
1
2
MemRead ALUSrcA0 IorD0 IRWrite ALUSrcB01 PCWrit
e PCSource00
START
( LW or SW )?
( R-TYPE )?
( BGT )?
( BEQ )?
( JUMP )?
( BLT )?
( BNE )?
ALUSrcA1 ALUSrcB0 PCWrite Cond PCSource01 b_ctr
l10
ALUSrcA1 ALUSrcb10
ALUSrcA1 ALUSrcB00
ALUSrcA1 ALUSrcB00 PCWriteCond01 b_ctrl01
PCWrite PCSource10
ALUSrcA1 ALUSrcB00 PCWriteCond01 b_ctrl00
PCWrite PCSource10
( SW )?
( LW )?
RegDst1 RegWrite MemtoReg0
MemRead IorD1
RegDst1 RegWrite MemtoReg0
RegDst0 RegWrite MemtoReg1
5
Instruction Set
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