Interconnect Routing in VLSI

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Interconnect Routing in VLSI
Glauco Borges Valim dos Santos - FUCAS - GME - II
- UFRGS - 2004
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Interconnect Routing is the task of making
electrically equivalent a set of points
concerning to gates inputs/outputs. Consider the
logic gate schematic representation of an
hypothetical circuit
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Each set of inputs/output correspond to a net
whose terminals should be connected in order to
make them electrically equivalent by the
definition of physical conductive wire segments
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So, this is a net ...
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and also is this ...
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and this ...
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Now, lets focus our attention to a single net
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Say this one
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With the output coming from a nand gate and the
inputs going into an inverter, a nor gate and
another nand gate
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Lets call them NANDA, INV, NOR and NANDB
respectively
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So, weve got
INV
NOR
NANDA
NANDB
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Lets now suppose they are mapped to physical
standard cells
INV
NOR
NANDA
NANDB
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With the respective relation between their
inputs/output terminals
INV
NOR
NANDA
NANDB
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Now imagine that a previous placement process...
INV
NOR
NANDA
NANDB
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Have placed them in rows, like this
other cells
INV
cell row
NOR
NANDA
NANDB
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The routing task is to connect the net terminals
with metal segments, generally only in
horizon/vertical directions, and vias for layers
connection
INV
net termninals
NOR
NANDA
NANDB
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The problem is abstracted to a Graph Theory
problem with the vertices corresponding to cell
pins and the edges to metal segments. This is
called symbolic routing