Complete Computer System Simulation: The SimOS Approach

1
Complete ComputerSystem SimulationThe SimOS
Approach

• 2005. 12. 5.
• Hae-woo Park

2
Table of Contents

• Motivation
• Basic Concept
• Direct Execution
• Detailed Simulation
• Performance
• Conclusion

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Motivation

• Challenges
• Complexity of computer systems ?
• Diversity of workloads ?
• Difficulties in
• System test
• System evaluation verification
• System prototyping

? Software simulation
4
Motivation (contd)

• Software simulation
• Simulating the behavior of a given system
• For system researchers and designers
• cf. some VMs for software developers and users
• Problem
• Trade-offs between speed and accuracy

5
Motivation (contd)

• Problem detail
• At high speed and low accuracy
• e.g. omitting OS simulation
• The behavior tends to be poorly understood
• At low speed and high accuracy
• Less interesting parts may consume much time
• e.g. booting or system initializing

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Basic Concept

• SimOS simulation environment
• Model complete computer systems
• OS system support (i.e. privileged mode support)
• Simulate system hardware at high speed
• Less than a factor of 10 slower than native
  execution
• Control the level of simulation detail
• More detailed level simulation for interesting
  parts

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Basic Concept (contd)

• SimOS architecture

Pmake
Sybase
Ocean
Unaltered Application
Irix version 5.2 (Target Operating System)
Ethernet
SimOS Target H/W Layer
Disk models
CPU/MMU models
RAM
Console
Memory system models
Irix version 5.x Unix SVR4
Host Platform
Mips R4000-based SGI multiprocessor
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Basic Concept (contd)

• SimOS architecture (contd)
• SimOS is a simulation layer
• On top of general-purpose Unix multiprocessors
• Consist of simulated hardware components
• Simulated H/W components
• Each has multiple implementation
• Provide various speed/detail levels

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Direct Execution

• Direct execution mode
• Fastest simulation mode
• Good for booting or initializing the system
• Requires
• Strong similarities between the simulated
  architecture and the simulation platform
• User-level environment
• Look enough like raw hardware for guest OS

10
Direct Execution (contd)
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Direct Execution (contd)

• CPU simulation
• Using the process abstraction
• Each CPU in the target ? a different host process
• Host system activity is transparent to the
  process
• Fast run at the native CPUs speed
• Operations not permitted in user-level process
• Trap architecture
• Privileged instructions

Problem !!
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Direct Execution (contd)

• CPU simulation (contd)
• Simulation of trap architecture

Application
Irix version 5.2 (Target Operating System)
? Run exception handler
? Converted exception info.
Signal Handlers
SimOS Layer
? Trap
? Signal
Irix version 5.x Unix SVR4
Host Platform
Mips R4000-based SGI multiprocessor
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Direct Execution (contd)
Direct Execution (contd)

• CPU simulation (contd)
• Simulation of privileged instruction

Application
Irix version 5.2 (Target Operating System)
? Continue
Signal Handlers
SimOS Layer
? Exception
? Interpret the instruction
? Signal
Irix version 5.x Unix SVR4
Host Platform
Mips R4000-based SGI multiprocessor
14
Direct Execution (contd)

• MMU simulation
• Physical memory of the target machine
• Make a single file
• Map a page-size chunk into the address space
• Utilize the file-mapping routines of the host
• c.f. mmap/munmap system call
• Requests of the target OS
• Appear as privileged instructions
• Can be detected and simulated
• Protection
• c.f. mprotect system call

15
Direct Execution (contd)

• MMU simulation (contd)

Physical memory file(target machine memory)
CPU-simulating process
References succeed
References tothese addressescause page faults

Target machinesvirtual addressspace
Free pages
References succeed
Write to theseaddresses causeprotection faults
Read-onlymappings
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Direct Execution (contd)

• Device simulation
• Similar to the privileged operation management
• The signal handler does real I/O
• Simulation of a disk
• Use a file for each target disk
• Simulation of an Ethernet device
• Send message to an Ethernet simulator process

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Detailed Simulation

• Binary translation
• Almost the same as that in our text book
• Allows more execution control
• Code annotation for timing
• Instruments the translation
• Examples
• Count the number of instructions
• Count the clock cycle
• Check the cache hits and misses

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Detailed Simulation (contd)

• Binary translation (contd)

Workload code block
Minimal binary translation
Code annotations
lw r3, 10(r1) add r4, r3, r2
load tmp1, simRegs1 load tmp2, (tmp110) store
tmp2, simRegs3
MMU data addresstranslation(8 cycles On hit)
MMU addresstranslation(4 cycles On hit)
load tmp1, simRegs2 load tmp2, simRegs3 add
tmp3, tmp1, tmp2 store tmp3, simRegs4
Cache simulation (4 cycles on hit)
Cycle counting (2 instructions)
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Detailed Simulation (contd)

• Software interpretation
• Two implementation in SimOS
• Simple fetch-decode-execute loop
• Cycle-by-cycle interleaving of all CPUs
• All CPUs are simulated in a single process
• Highly aggressive processor
• Multiple instruction issue
• Out-of-order execution
• Hardware branch prediction

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Detailed Simulation (contd)

• Switching simulators
• For sampling
• By running in one CPU simulator for a given clock
  cycles and switching to another simulator
• Get information in detailed mode
• Take performance in less detailed mode
• For positioning workloads
• Fast simulation for booting, initializing the
  workload
• Detail simulation for examination the workload

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Detailed Simulation (contd)

• Memory system simulation
• Consideration of
• Memory hierarchy
• Memory latency
• Direct execution mode
• Does not model of memory system (no cache model)
• Binary translation mode
• Model single level of cache
• More detailed mode
• Multilevel cache model

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Performance
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Conclusion

• SimOS has two key features
• Model complex workloads
• Including all OS activity
• Dynamically adjust the level of simulation detail
• SimOS environments effectiveness
• Architectural evaluation
• System software development
• Workload characterization