Clock Distribution for IceCube

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Clock Distributionfor IceCube

• June 8, 2004
• Lawerence Berkeley National Laboratory
• Gerald Przybylski

GTPrzybylski LBNL 10/13/2003
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Big Picture
ExacTime ET6000 GPS Clock(s)
US Naval Observatory(1E-15 Allan Var. ) UTC
Slaved Rubidium Oscillator Inside, Allan Var.
Master Clock Unit
Serial
Fan Out
Balanced Drivers
1pps
10 MHz
(With Oven Crystal option)
DOM Hub
Equal Length Twisted Pairs 10 Mhz, 1pps,
RS-232 Cat5E with RJ-45s
DOM Hub
DOM Hub
DOM Hub
DOM Hub
90 DOM Hubs
GTPrzybylski LBNL 6/8/2004
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Rubidium Oscillator Allan Variance

• Figure from http//www.srsys.com/products/PRS10.h
  tm

GTPrzybylski LBNL 10/13/2003
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Rubidium Clock Phase Noise

• Figure from http//www.srsys.com/products/PRS10.ht
  m

GTPrzybylski LBNL 10/13/2003
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Accuracy and Precision

• The US Naval Observatory20 Atomic Clock array
  keeps time to
• GPS SatellitesSynchronized to USNO clock.
• DOMs more stable than XL GPS clocks40ns RMS
  150ns Peak Error 3E-10 10 sec Allan variance
  Radio Propagation Path variationsGPS Receiver
  Local Oscillator jitter.
• In House Cable Delays Fixed Phase ShiftsGPS
  Clock -to- Master Clock UnitMaster Clock -to-
  DOM Hub Fan-OutFan-out -to- DOR FPGA FPGA -to-
  Wire

GTPrzybylski LBNL 10/13/2003
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Inside the DOM Hub
Internal, equal length fanout cables

Power Supplies Fans Monitors (Possibly Diskless)
DOR card
DOR card
DOR card
DOR card
DOR card
DOR card
DOR card
DOR card
Clk Fan-Out
CPU
Cable From Master Clock Unit
20 MHz (Orange Twisted Pair) 1 Pulse per Second
(Green Twisted Pair) RS-232 Time String (Brown
Twisted Pair)
GTPrzybylski LBNL 10/13/2003
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The DOR Card
Data Buffer SRAM 2 x 256Kx16
Cable Interface 0
PCI - Core
Cable Interface 1

DOM 1..4
Cable Interface 2
Cable Interface 3
DOM 5..8
PCI Bus
Altera FPGA EP20K200E
10 MHz
DSB 1-to-8 Slave Clock Fan-out (PCI Card) 20
MHz Aux. Osc.
1 pulse/second
Config
JTAG
Master Clock
(Serial) Time String
JTAG
JTAG
Altera PLD EPM7064
FLASH 1M x 8
96 V
KHS 10-2003
GTPrzybylski LBNL 10/13/2003
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DOR_Rev1, Block Diagram
/-48 V
wiredOR
Power-sw. 1..4
DOM 1..4
nPON_1..4
nPON_1..4
CommunicationsControllerAltera EP1C20F400C8
Cable Interface 0
PCI Core
Local Bus
Cable Interface 1
DOM 5..8
Cable Interface 2
PCI Bus
Cable Interface 3
PCI Bus-Ctrl Altera EP1K50FC256-1
Config
JTAG
Memory Bus
JTAG
Config
Clock_sel
DSB 1-to-8 Slave Clock Fan-out (PCI Card) 20
MHz Aux. Osc.
JTAG
1PPS Serial
Master Clock
JTAG
Config. PLD Altera EPM7128BFC100-10
Data Buffer SRAM 2 x 256Kx16
local Osc.
FLASH 2M x 8
PLL QS5LV919
Clock
K-H Sulanke 6/8/.04
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Signaling Issues

• Maximize Noise Immunity in Counting House- Avoid
  Winter Noise Storms- Avoid Motor Noise, Welder
  Noise, etc
• Minimize EMI and RFI- Computers and Instruments
• Proven Technology- Price- Component
  Availability- Track Record

GTPrzybylski LBNL 6/8/04
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Master Clock to DSB
Like 802.3
RS-485
GTPrzybylski LBNL 6/8/04
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DSB to DOR
LVDS
GTPrzybylski LBNL 6/8/04
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Master Clock FeaturesPY03, this year

• Single ET6000 (Xtal, or Rubidium?)- OCXO 10
  Sec Allan Variance 2E-11, -120 dBc/Hz Phase
  Noise - Rubidium 10 Sec Allan Variance 1E-11,
  -91 dBc/Hz Phase Noise
• 10 MHz from Half the Optional Outputs- Drive
  LEMO Inputs through coax
• 1 Hz from Half the Optional Outputs- Drive LEMO
  Inputs through coax
• RS-232 from (DTR) DB-9- Daisy-Chain cable
• Cold Spare in Rack
• Heated Radome on TCH Roof (-40C)

GTPrzybylski LBNL 6/8/04
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PY03 Deployment
Temporary Counting House
GPS Clock (Hot)
BOM GPS Clock 4 identical BNC to LEMO cables (10
MHz) 4 identical BNC to LEMO cables (1 PPS) 1
Serial daisy-chain cable (Time String) Antenna
Heater
Serial Port cable
DOM Hub, String 0
DOM Hub, String 1
DOM Hub, String 2
DOM Hub, String 3
10 MHz 1 PPS
GTPrzybylski LBNL 6/8/04
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Master Clock FeaturesPost PY03

• Multiple GPS clock inputs (?)- Fail-over (?)
  Voting (?)
• Status display (?)- Local Time display- Fault
  indicator- Fault Reporting- Selected Clock
• Clock Relay Port feeding back to MAPO (?)-
  Supply AMANDA with the IceCube Ref Clock
• CPU Monitoring Functions via POE, or CAN (?)-
  Voltages, Temperatures, Fans- CPU Reset
  Power on/off

GTPrzybylski LBNL 6/8/04
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Summary

• DSB to DOR card Functionality Demonstrated
• GPS clock Drive to DSB demonstrated
• Firmware under development (Sulanke)
  possible involvement by LBNL too
• DSB usable, as is, at the Pole for first
  deployment
• Oven Crystal GPS Clock in hand (ExacTime ET6000)
• Simplified Deployment Plan Exists for this year.

GTPrzybylski LBNL 6/8/04