Title: DCPR RRC Pulse Shaping to Increase Capacity
1DCPR RRC Pulse Shaping to Increase Capacity
- Ryan Shoup, John Taylor, Bob Wezalis, Josh
Model - Aug 2004
2Rationale / Overview
- Root Raised Cosine (RRC) Review
- Spectrally efficient waveform
- Implementation
- General RRC considerations wrt DCPR
- Envelope variation
- Performance considerations
- Timing recovery
- Matched filter demodulation
- General considerations when increasing DCPR
capacity - Laboratory demonstration of the Current
modulation scheme with Root Raised Cosine (RRC)
Filtering - Concept
- Laboratory demonstration
3GOES Data Collection System (Today)
- Communications link designed to relay information
gathered from data collection platforms (DCPs)
located throughout Western Hemisphere - 400 KHz bandwidth allocated for the the GOES DCS
communications link - Multiple Access system
- 200 FDMA channels _at_ 1500 Hz
- 33 FDMA channels _at_ 3000 Hz
- Three data rates supported per channel
- 100 bps BPSK modulation _at_ 1500 Hz
- 300 bps 8-PSK TCM modulation _at_ 50 dBm (max) and
1500 Hz - 1200 bps 8-PSK TCM modulation _at_ 53 dBm (max) and
3000 Hz - Channels alternate between two satellites
- DCP Messages comprise of a header information
- Desirable to modify system to support growth in
DCPs during the GOES-R era
4DCPR 8-PSK Performance
5RRC
- Root Raised Cosine (RRC) Filtering implemented in
software/firmware - Spectrally efficient pulse shape
- Pulse shape well suited to accommodate modest
amount of growth to system - Capacity increase of 2x
- Implementation in transmitter relatively easy via
digital filtering - FPGA, D/A, and LPF
- Components probably in many transmitters already
anyhow - Commercial ICs also available to perform RRC
filtering - Pulse shape parameters
- Rolloff coefficient (?)
- 0 ? ? ? 1
- Bandwidth required ? as ? ?
- BER performance sensitivity ? as ? ?
- Number of coefficients (N)
- Bandwidth required ? as N ?
- BER performance ? as N ?
- Wide use of RRC
- Cellular telephony
- Satellite
6Notional RRC Transmitter
Notional DCPR transmitter
Baseband RRC Waveform
DCPR Message Formatter
Sensor
TCM
D/A
Upconverter
FIR Filter
LPF
HPA
- RRC filtering would be performed on data
collected from sensor - FIR Filter easily performed on small low cost
CPLD/FPGA or software via microprocessor - Only low speed D/A ( 15 KHz) needed
- Analog LPF removes D/A sampling images created
at the sample frequency
7Notional RRC Receiver
Notional DCPR 8-PSK Receiver
Trellis Decoder
Down Sample
Phase Compensation
Downconverter
LPF
A/D
FIR Filter
Peak Matched Filter Output Detector
Digital PLL
- Rx employs RRC matched filter detection for best
performance - Rx employs software/circuitry to detect/track the
timing of peak outputs of the matched filter - A digital PLL can be used with an easily
software configurable bandwidth - Trellis decoder remains same as used today
8RRC Implementation Tradeoffs
- Practical baseband spectrum approaches
theoretical as Coeffs ? - 100 Coefficients results in near ideal baseband
spectrum
9RRC Implementation Tradeoffs
- Practical baseband spectrum more closely
resembles theoretical as ? ?
10RRC Considerations Envelope Variation
- Although average power same, instantaneous power
varies more than that of a waveform that occupies
more bandwidth - Effect measured or quantified by the peak to
average ratio - Ideally, transmit HPA will be linear over full
range of instantaneous power - If effect not mitigated, may potentially require
larger transmitter power amplifiers - Effect of envelope variation mitigated by
- Use of higher value of roll off coefficient
- Use of coding to reduce required EB/N0
- High Power Amplifier linearization techniques
118-PSK Peak to Average
Legend
1
Standard-compliant filter
RRC, alpha 1.0
0.8
RRC, alpha 0.1
Probability
0.6
0.4
0.2
0
0
1
2
3
4
5
6
7
8
9
10
Instantaneous Peak Power to Average Power Ratio
3 to 4 dB
6 dB
Instantaneous RRC 8-PSK power can be upto 2-4 dB
higher than notional standards-compliant filter
7.25 dB
12RRC Considerations Matched Filtering
- Optimal implementation requires that CDA employ
matched filter demodulation - Filter matched to transmitted RRC waveform
- Without matched filter, loss can be on the order
of 1 dB
DCPR 8-PSK TCM Asymptotic BER
-2
10
Integrate and Dump
-3
10
-4
10
Probability of Bit Error
-5
10
-6
10
-7
10
Ideal
-8
10
3
4
5
6
7
8
9
10
SNR per bit (EB/N0)
No matched filter at receiver degrades BER
13RRC Considerations Matched Filtering
DCPR 8-PSK TCM Asymptotic BER
- With matched filter at the receiver, only
relatively few coefficients needed for near ideal
BER
-2
10
Few Coeffs
-3
10
-4
10
Probability of Bit Error
-5
10
-6
10
-7
10
Ideal
-8
10
3
4
5
6
7
8
9
10
SNR per bit (EB/N0)
14RRC Considerations Timing Recovery
- Ideal BER performance requires matched filter
output sampled at appropriate time - Error results in BER degradation due to ISI and
SNR loss - Performance degradation function of timing error
and ?
Loss due to ISI Incurred from timing error
Example RRC sensitivity to timing error
0.2 dB
Performance Loss
1.2 dB
2.2 dB
15DCPR Capacity Considerations
- DCP Transmit Power Levels
- Keep at current levels to minimize changes to
DCPs - Desirable to avoid need for new antennas, larger
power amplifiers, etc. - Ideally DCP power levels even reduced to avoid
issues with instantaneous power variation
associated with RRC waveforms - Satellite Power Levels
- Desire to keep signal power levels through
satellite only moderately greater than that
associated with GOES NOP series - Power limitations on AGC circuitry and amplifier
- Transmit Power Levels
- Need to ensure compliance with PFD requirements
- Neg 154 dBW per m2 per 4 KHz
- Current levels 10 dB lower when channels fully
loaded - Frequency tolerance
- Need to consider frequency tolerance
specification when adding additional FDMA
channels
168-PSK TCM with RRC Filtering
- Apply RRC filtering to the current modulation
- Roll off coefficient ? 1.0
- Theoretical Bandwidth required 300 Hz
- Subdivide the current 1500 Hz DCPR channel into
two channels doubling the number of 300 bps
channels available - Allocate 750 Hz per channel
- More than necessary to accommodate actual
(non-ideal) waveform, frequency tolerance
specification, and some guard band - Additional channels decrease power per channel
- If AGC limits power levels, then EB/N0 at the
ground receiver decreases - Capability for additional channels function of
specified minimum G/T at ground site - Increasing min ground station G/T by 3 dB would
accommodate a doubling of capacity while
maintaining satellite power levels to those seen
today - Only necessary for DRGS sites, as Wallops G/T far
exceeds specified min DCPR min receive G/T - Draft version of GOES-R IRD calls for G/T
increase as well as satellite downlink EIRP
increase
17RRC 8-PSK TCM Demo
- Benchtop demonstration to demonstrate 8-PSK TCM
RRC BER performance - Demonstration details
- Data sequence (PRN) generation and Trellis
encoding performed in a Xilinx FPGA - RRC filtering and upconversion performed by RS
Signal Generator (SMIQ) - Noise added at RF via Carrier to Noise Generator
(CNG) - Downconversion done using mini-circuits RF
component mixer and HP signal generator (LO) - Labjack used to A/D baseband I/Q signals
- PC microprocessor receiver performs timing
recovery, phase recovery, matched filter
demodulation, trellis decoding, and measures BER - Frequency recovery not needed as HP LO frequency
locked to SMIQ - Observed BER performance 1 dB from theoretical
- Caveat Transmit amplifiers operated in linear
region
18RRC 8-PSK TCM Demo Block Diagram
Frequency Reference
HP Sig Gen
CNG
70 MHz
Xilinx FPGA
RS SMIQ
Mixer
Data (300 bps) Clock
Interface Board
Baseband I/Q
IQ A/D samples
Labjack
PC
19RRC 8-PSK TCM Demo Photo
20RRC 8-PSK TCM Demo Photo
21RRC 8-PSK TCM Demo Spectrum
22RRC 8-PSK TCM Demo BER
23Summary
- RRC filtering effective means to increase
capacity of DCPR system to accommodate future
growth - RRC filtering introduces issues
- Power levels
- Transmit filtering
- Timing recovery
- Need to perform Matched Filtering
- At DCPR data rates, transmit filtering, matched
filtering, phase/frequency recovery easily
implemented in low cost FPGAs, or microprocessors