Title: Interconnect and Packaging Lecture 3: Skin Effect
1Interconnect and PackagingLecture 3 Skin Effect
Chung-Kuan Cheng UC San Diego
2Outlines
- Transmission Line Model
- Spectrum of Configurations
- Skin Effect
- Coaxial Cable
3I. Transmission Line Model
- Voltage drops through serial resistance and
inductance - Current reduces through shunt capacitance
- Resistance increases due to skin effect
- Shunt conductance is caused by loss tangent
4I. Interconnect Model
5I. Interconnect Model
6I. Interconnect Model (Constants)
- AWG (American Wire Gauge
- Wire Diameter 2.54x10-(AWG10)/20
- Copper p 2.2uohm-cm
- Copper thickness 1oz(/sqft) 36um
- Electric Permittivity of Air 8.85x10-12F/m
- Magnetic Permeability of Air
- Characteristic Impedance of Air
7II. Spectrum of Configurations
RLGC R L G C
0001 ( jwC ) Capacitance
0010 ( G ) Shunt
0011 ( G jwC ) Leaky Capacitance
0100 ( jwL ) Inductance
0101 ( jwL )( jwC ) Lossless LC Line
0110 ( jwL )( G ) Skin Effect Derivation
0111 ( jwL )( G jwC ) Skin Effect Permitivity
1000 ( R ) Resistance
1001 ( R )( jwC ) RC Line
1010 ( R )( G ) Leaky Resistance
1011 ( R )( G jwC ) Leaky RC Line
1100 ( R jwL ) Lossy Inductance
1101 ( R jwL )( jwC ) Lossy LC Line
1110 ( R jwL )( G ) Lossy and Leaky Inductance
1111 ( R jwL )( G jwC ) Transmission Line
8III. Skin Effect
Assuming that resistance and capacitance are
negligible.
Skin Depth
(Equivalent Depth of Uniform Current)
9IV. Coaxial Cable
10IV. Coaxial Cable Inductance
11IV. Coaxial Cable Inductance
12IV. Coaxial Cable Inductance
13IV. Coaxial Cable Impedance
14IV. Coaxial Cable Impedance
15HW1 Remarks on z900
- Chip (Processor)
- 10x17 sqmm, 38W, 918MHz, 250MIPS
- 128bits to each L2 cache chip
- 280um pitch chip to MCM
- MCM
- 127x127sqmm, 5xTerabits/s, 459MHz
- 20 Processors, 8x4MB Memory
- 11Knets, 95mm max length on critical path
- 1ns on MCM, 1.4ns off MCM
- 33um think film pitch, 396um ceramic substrate
- 101Kpins, 35.3pin/sqcm
- 4224pins/1735pg to PCB
16HW1 Remarks
- Board
- 553x447sqmm, 1 MCM, 64GB memory, 24 STI
- 7 mils pitch (3.3width/4sep)
- 24GB/s IO, 1GB/s bus, 240lines/MBA (6GB/s),
- 10pairs/STI, 9 signals/1 clock
- 3516nets, 19,788pins (signals pg), 8pins/sqcm