Lecture 12: Virtual Memory

1
Lecture 12Virtual Memory

• Prof. Kenneth M. Mackenzie
• Computer Systems and Networks
• CS2200, Spring 2003

Includes slides from Bill Leahy
2
Review

• malloc() algorithms
• Overlays?, Relocation?
• Relocation in hardware base/limit, segments
• Paging
• mechanisms
• policy

3
Algorithms

• First-fit (FASTER)
• Can search from either end
• Start at beginning or where left off
• Best-fit
• Allocate smallest hole that is big enough
• Must search entire list (or keep sorted list)
• Produces smallest leftover hole
• Worst-fit (WORST PERFORMANCE)
• Allocate largest hole
• produces largest leftover hole

4
Relocation in HardwareBase and Bound registers
physical address space
Processor
SEGV trap
lt(bd-bs)
base
bound
Memory
(bound - base)
base
0
5
Paging
Logical Address Space divided into pages
Physical Address Space divided into frames
page table
a logical page can be mapped to any physical frame
6
Today

• Page tables
• data structures!
• Virtual memory
• what happens when pages gt frames
• opens up policy questions.
• Performance of virtual memory
• phenomenon of locality, working sets
• average-memory-access-time (AMAT)

7
Paging Hardware
Physical Memory
32
32
CPU
page
offset
frame
offset
page table
page
frame
8
Paging Hardware
Physical Memory
How big is a page? How big is the page table?
32
32
CPU
page
offset
frame
offset
page table
page
frame
9
Paging Hardware
Physical Memory
How big is a page? 4K-16KB ...
lets use 4KB How big is the page table?
12
32
32
CPU
page
offset
frame
offset
20
20
page table
page
frame
10
How big is a page table?

• Suppose
• 32 bit architecture
• Page table 4 kilobytes
• Therefore

Offset 212
Page Number 220
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How big is a Page Table Entry

• Need physical page number 20 bits
• Protection Information?
• Pages can be
• Read only
• Read/Write
• missing entirely(!) (invalid)
• Possibly other info
• So, how big is a page table?
• 220 PTE x 4 bytes/entry 4 MB

12
Where is the Page Table?
M X
1
P C
Instr Mem
DPRF
BEQ
A
Data Mem
M X
M X
D
SE
WB
EX
MEM
ID
IF
13
Page Table in Memory?
Physical Memory
CPU
42
356
256
356
page table
256
42
14
Two Problems

• 1. its slow! Weve turned every access to
  memory into two accesses to memory
• 2. its still huge!

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Two Problems

• 1. its slow! Weve turned every access to
  memory into two accesses to memory
• solution add a specialized cache called a
  translation lookaside buffer (TLB) inside the
  processor
• punt this issue for a lecture (until Thursday)
• 2. its still huge!
• even worse were ultimately going to have a page
  table for every process. Suppose 1024 processes,
  thats 4GB of page tables!

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Alternate Data Structures?
logical address space
unused
stack

• ?

data
code
17
Multi-level Page Tables

• Sometimes described as paging the page table

Page 1
Page 2
Offset
Physical Memory
Outer Page Table
Page of Page Table
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Hash Tablesusually called inverted page tables

• One entry for each physical frame
• ltProcess_ID, Page_Numbergt
• Each virtual address consists of
• ltProcess_ID, Page_Number, offsetgt
• When processor issues memory request entire table
  is searched for match.
• Use hashing to get performance
• Also use form of TLB

19
Paging Summary
physical address space
user 1 logical address space
Processor
SEGV trap
I/O
frames area
lookup
user 2 PT
Memory
user 1 PT
PT base
user 1
kernel
user 1
0
20
Administrivia

• Project 2 questions
• summary to .announce
• midterm
• q6. enable interrupts could be in several places

21
Virtual Memory

• Scheme that allows execution of a process that is
  not 100 in memory.

22
Valid/Invalid Bit

• Before
• Used to indicate a page that the process was not
  allowed to use
• Encountering absolutely meant an error had
  occurred.

• Now
• Indicates either the page is still on disk OR the
  page is truly invalid
• The PCB must contain information to allow the
  processor to determine which of the two has
  occurred

23
Page Fault
Disk
Physical Memory
Operating System
CPU
42
356
356
page table
i
24
Page Fault
Physical Memory
Operating System
CPU
42
356
356
page table
i
25
Page Fault
Physical Memory
Operating System
TRAP!
CPU
42
356
356
page table
i
26
Page Fault
OpSys says page is on disk
Physical Memory
Operating System
CPU
42
356
356
page table
i
27
Page Fault
Small detail OpSys must somehow maintain list of
what is on disk
Physical Memory
Operating System
CPU
42
356
356
page table
i
28
Page Fault
Physical Memory
Operating System
CPU
42
356
356
page table
i
29
Page Fault
Physical Memory
Operating System
CPU
42
356
356
page table
Free Frame
i
30
Page Fault
Physical Memory
Operating System
CPU
42
356
356
page table
i
31
Page Fault
Physical Memory
Operating System
CPU
42
356
356
page table
295
v
32
Page Fault
Physical Memory
Operating System
CPU
42
356
356
Restart Instruction
page table
295
v
33
Page Fault
Physical Memory
Operating System
CPU
42
356
295
356
page table
295
v
Now it works fine!
34
Mechanism vs. Policy

• Mechanism
• paging hardware
• trap on page fault
• restartable instructions (subtle benefit of RISC)
• Policy
• fetch policy when should we bring in the pages
  of a process?
• replacement policy which page should we evict
  given a shortage of frames?

35
Fetch Policy

• 1. load all pages at the start of the process
• 2. load only on demand demand paging

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Demand Paging

• Paging systems
• Swapping systems
• Combine the two and make the swapping lazy!
• Remember the invalid bit?

Page Table
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Performance of Demand Paging

• Assume probability of page fault is p
• So 0 ? p ? 1
• Effective access time
• (1 - p) x ma p x pageFaultTime

38
Page Fault
OpSys says page is on disk
Physical Memory
Operating System
CPU
Restart Instruction
page table
i
39
Performance of Demand Paging

• Assume probability of page fault is p
• So 0 ? p ? 1
• Effective access time
• (1 - p) x ma p x pageFaultTime
• (1 - p) x 100 p x 25,000,000
• 100 24,999,990 x p
• If p 0.001
• Effective access time 25 ?sec (250xs!)

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Performance of Demand Paging

• If we want only 10 degradation in performance
• 110 gt 100 25,000,000 x p
• 10 gt 25,000,000 x p
• p lt 0.0000004.
• Thus, 1 memory access in 2,500,000 can page
  fault.

41
Replacement Policy

• Given a full physical memory, which page should
  we evict??

42
Phenomena

• Locality
• Working Set

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Replacement Policy

• Random
• FIFO First-in-first-out
• LRU Least-Recently-Used
• MRU Most-Recently-Used
• OPT (will-not-be-used-farthest-in-future)

44
Replacement Policy Simulation

• example sequence of page numbers
• 0 1 2 3 42 2 37 1 2 3
• FIFO?
• LRU?
• OPT?

45
LRU Implementation

• How do you keep track of LRU info? (another data
  structure question)

46
Other VM Trix

• Controlled sharing
• map same frame into two processes address space
• Demand-zero pages
• dont immediately allocate frames for malloc().
  Instead, wait and see if they are ever used.
• Copy-on-write
• perform a copy (e.g. between address spaces) by
  mapping the original frame read-only. Peform the
  copy only if a page is ever written.

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yep, Virtual is a pun

• Virtual as in my data may be on disk at this
  moment instead of in memory (caching)
• Virtual as in private, isolated address spaces
  (protection)
• Virtual as in data can be generated on demand,
  memory accesses create events, etc.
• zero-fill on first touch
• VM-based multiprocessor shared-memory

currently, the caching feature is of less
importance