Low Power RF Low Noise Amplifier

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Low Power RF Low Noise Amplifier

• Rakshith Venkatesh

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What is an RF Low Noise Amplifier?

• The low-noise amplifier (LNA) is a special type
  of amplifier used in the receiver side of
  communication systems to amplify very weak
  signals captured by an antenna.
• RF means high frequency (hundreds of MHz to GHz).
• The job of the LNA is to boost the incoming
  signal power while adding as little noise and
  distortion as possible to this received signal.
• For example, the 5GHz frequency band is the used
  for wireless communication. IEEE 802.11 wireless
  standard uses this frequency band.

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About this project
Typical values of conventional design and my
objective

• The main intension is to design a low power RF
  amplifier without sacrificing the amplifier
  gain and its Noise-Figure (SNR_in/SNR_out).

Cascode Design Low Power Design
Technology 90nm 90nm
Frequency 5.5GHz 5GHz
Gain gt13dB gt 12dB
Power Dissipation gt8mW lt 4mW
Noise Figure 2-3dB lt 4dB
S12 lt-25dB lt -25dB
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Design Steps

• The bias current (0.13mA/um) is selected and then
  the W of the transistors based on this. The
  supply voltage is decided based on the number of
  stages stacked and the gain needed. Start off
  with the Vdd specified for the technology.
• The MOSETs are biased and we must ensure that all
  the transistors are operating in the saturation
  region (Vds gt Vgs Vth). Gate biasing voltage is
  calculated using the transfer characteristics of
  the stage.
• Impedance matching at the input stage of the
  amplifier is done so that the input impedance is
  equal to 50Ohm, the series resistance of the RF
  signal source.
• Output impedance matching is done assuming the
  device is terminated at 50Ohm. In other words the
  load resistance is 50.
• The simulation is run using HSPICE and the
  parameters like S21(gain), S11, S22, S12, NF,
  NFmin and power dissipation are calculated.

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Conventional Design of an LNA
Ref 60-GHz PA and LNA in 90-nm RF-CMOS, Yao T
et.al, Radio Frequency Integrated Circuits
Symposium, 2006, IEEE, 4 pp.
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Circuit Diagram of the LNA in this work
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S21 or Gain of the designed LNA
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S12 or Reverse Isolation
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S11 plot
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S22 plot
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NF with Nfmin 3.5dB
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Power Calculation

• The bias current of the circuit is 3.2 mA and
  the power supply voltage is 1.5 V.
• Hence, Power Dissipation Bias Current . Vdd
• 4.8mW

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Comparison with low power designs
Parameter Paper1 Paper2 This work
Technology (nm) 250 90 90
Voltage Supply (V) 2 1.2 1.5
Frequency (GHz) 2.4 5.5 5.0
Gain (dB) 14.7 15.4 13
Noise Figure(dB) 2.5 2.7 5.6
Power (mW) 1.97 20.6 4.8
S12 (dB) -28 -32 -45.86
S11 (dB) -20 -14 -10.3
S22 (dB) -22 -8.8 -14.5
1 Design of a New Low-Power 2.4 GHz CMOS LNA,
Ickjin Kwon and Hyungcheol Shin Journal of the
Korean Physical Society, Vol. 40, No. 1, January
2002, pp. 47 2 Low-power 5 GHz LNA and VCO in
90 nm RF CMOS , D. Linten et.al, VLSI Circuits
2004, Digest of Technical Papers. 2004 Symposium,
17-19 June 2004, 372- 375.
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Comparison with normal designs
Parameter Paper3 Paper4 This Work
Technology(nm) 90 90 90
Voltage Supply (V) 1.2 1.2 1.5
Frequency (GHz) 5.5 3.1 to 5.9 5.0
Gain (dB) 13.3 13.5 13
NF (dB) 2.9 2.8 3.8 5.6
Power (mW) 9.72 5.4 4.8
S12 (dB) -28 lt-57 -45.86
S11 (dB) -14.4 - 15 -10.3
S22 (dB) -19 NA -14.5
3 A 5-GHz Fully Integrated ESD-Protected
Low-Noise Amplifier in 90-nm RF CMOS, IEEE
journal of solid state circuits, Dimitri Linten
et.al, VOL. 40 No. 7 JULY 2005. 4 A 90-nm CMOS
Two-Stage Low-Noise Amplifier for 3-5-GHz
Ultra-Wideband Radio , Radio Frequency
Integrated Circuits Symposium 2008, p489 492.
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Conclusion and Future work

• The current re-use technique will enable bias
  current sharing between two amplifier stages.
• This in turn reduces the power dissipated in the
  circuit and hence the energy consumption.
• Noise matching at the input port can be improved
  to get a better NF.
• LNA for 60 GHz and above with low power design.
• The transistor stages are stacked in the work
  here, we can find the optimum number of
  transistor stages that can be stacked for a
  constant power supply Vdd and find gain and
  power consumption values for each increase in the
  stage.

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References

• http//bwrc.eecs.berkeley.edu/Research/RF/projects
  /60GHz/matching/ImpMatch.html for impedance
  matching.
• Introduction to LNA Design, queens learning
  wiki. http//bmf.ece.queensu.ca/mediawiki/index.ph
  p/Introduction_to_LNA_Design
• RF Microelectronics by B Razavi, Prentice Hall
  Communications Engineering and Emerging
  Technologies Series.
• Radio Frequency Electronics by Jon B Hagen,
  Cambridge University Press.
• 60-GHz PA and LNA in 90-nm RF-CMOS, Yao T
  et.al, Radio Frequency Integrated Circuits
  Symposium, 2006, IEEE, 4 pp.

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Questions